From: Tim Newsome <tim@sifive.com>
Date: Wed, 5 Sep 2018 20:27:58 +0000 (-0700)
Subject: Fix cut-and-paste bug in 64-bit SBA loads.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7de234911f6eb57fccf9609734ba807fa8f14cba;p=riscv-isa-sim.git

Fix cut-and-paste bug in 64-bit SBA loads.

Fixes #234.
---

diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index b209347..96de3c8 100644
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -280,7 +280,7 @@ void debug_module_t::sb_read()
     } else if (sbcs.sbaccess == 2 && max_bus_master_bits >= 32) {
       sbdata[0] = sim->debug_mmu->load_uint32(address);
     } else if (sbcs.sbaccess == 3 && max_bus_master_bits >= 64) {
-      uint64_t value = sim->debug_mmu->load_uint32(address);
+      uint64_t value = sim->debug_mmu->load_uint64(address);
       sbdata[0] = value;
       sbdata[1] = value >> 32;
     } else {