From: H.J. Lu <hongjiu.lu@intel.com>
Date: Sat, 6 Aug 2011 14:05:39 +0000 (+0000)
Subject: Add testcases for PRs 48084/49504/49860.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7dff453e64108f7010812e7f85e35f8a78cb096f;p=gcc.git

Add testcases for PRs 48084/49504/49860.

2011-08-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/48084
	* gcc.target/i386/pr48084-1.c: New.
	* gcc.target/i386/pr48084-2.c: Likewise.
	* gcc.target/i386/pr48084-3.c: Likewise.
	* gcc.target/i386/pr48084-4.c: Likewise.
	* gcc.target/i386/pr48084-5.c: Likewise.

	PR rtl-optimization/49504
	* gcc.target/i386/pr49504.c: New.

	PR target/49860
	* gcc.dg/pr49860.c: New.

From-SVN: r177509
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cb5adfe815f..f61bdab31cf 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2011-08-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/48084
+	* gcc.target/i386/pr48084-1.c: New.
+	* gcc.target/i386/pr48084-2.c: Likewise.
+	* gcc.target/i386/pr48084-3.c: Likewise.
+	* gcc.target/i386/pr48084-4.c: Likewise.
+	* gcc.target/i386/pr48084-5.c: Likewise.
+
+	PR rtl-optimization/49504
+	* gcc.target/i386/pr49504.c: New.
+
+	PR target/49860
+	* gcc.dg/pr49860.c: New.
+
 2011-08-06  Nicola Pero  <nicola.pero@meta-innovation.com>
 	
 	PR libobjc/49882
diff --git a/gcc/testsuite/gcc.dg/pr49860.c b/gcc/testsuite/gcc.dg/pr49860.c
new file mode 100644
index 00000000000..faa5f1fd7e3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr49860.c
@@ -0,0 +1,21 @@
+/* { dg-do assemble } */
+/* { dg-options "-O3 -funroll-all-loops" } */
+
+extern char inbuf[];
+extern char outbuf[];
+extern unsigned insize;
+extern unsigned inptr;
+static int max_len;
+static int peek_bits;
+void build_tree() {
+  int len;
+  char *prefixp;
+  max_len = inbuf[inptr++];
+  peek_bits = ((max_len) <= (12) ? (max_len) : (12));
+  prefixp = &outbuf[1<<peek_bits];
+  for (len = 1;
+       len <= peek_bits;
+       len++) {
+  }
+  while (prefixp > outbuf) *--prefixp = 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-1.c b/gcc/testsuite/gcc.target/i386/pr48084-1.c
new file mode 100644
index 00000000000..d9eef495cb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
+typedef float __v2sf __attribute__ ((__vector_size__ (8)));
+typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+void
+_mm_storeh_pi (__m64 *__P, __m128 __A)
+{
+  __builtin_ia32_storehps ((__v2sf *)__P, (__v4sf)__A);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-2.c b/gcc/testsuite/gcc.target/i386/pr48084-2.c
new file mode 100644
index 00000000000..2b41c0bba23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
+typedef char __v8qi __attribute__ ((__vector_size__ (8)));
+void
+_mm_maskmove_si64 (__m64 __A, __m64 __N, char *__P)
+{
+    __builtin_ia32_maskmovq ((__v8qi)__A, (__v8qi)__N, __P);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-3.c b/gcc/testsuite/gcc.target/i386/pr48084-3.c
new file mode 100644
index 00000000000..423c5980427
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-3.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse3" } */
+
+void
+_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
+{
+   __builtin_ia32_monitor (__P, __E, __H);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-4.c b/gcc/testsuite/gcc.target/i386/pr48084-4.c
new file mode 100644
index 00000000000..df465a313aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-4.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -msse2" } */
+
+void
+_mm_clflush (void const *__A)
+{
+  __builtin_ia32_clflush (__A);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-5.c b/gcc/testsuite/gcc.target/i386/pr48084-5.c
new file mode 100644
index 00000000000..d6ed8e5fc9c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-5.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mrdrnd" } */
+
+int
+_rdrand16_step (unsigned short *__P)
+{
+  return __builtin_ia32_rdrand16_step (__P);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr49504.c b/gcc/testsuite/gcc.target/i386/pr49504.c
new file mode 100644
index 00000000000..503e6c238ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr49504.c
@@ -0,0 +1,18 @@
+/* PR target/49504 */
+/* { dg-do run { target { x32 } } } */
+/* { dg-options "-O" } */
+
+unsigned long long 
+foo (const void* p, unsigned long long q)
+{
+  unsigned long long a = (((unsigned long long) ((unsigned long) p)) + q) >> 32;
+  return a;
+}
+
+int
+main ()
+{
+  if (foo (foo, 0x100000000ULL) != 0x1)
+    __builtin_abort ();
+  return 0;
+}