From: Marek Olšák Date: Sat, 4 Mar 2017 23:15:31 +0000 (+0100) Subject: radeonsi: drop support for LLVM 3.6 & 3.7 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e1faa79d31b44e3b3d7a4dc22d9b136300a761e;p=mesa.git radeonsi: drop support for LLVM 3.6 & 3.7 They are too old. Reviewed-by: Dave Airlie --- diff --git a/configure.ac b/configure.ac index 73bd7497b1d..21a73b031f4 100644 --- a/configure.ac +++ b/configure.ac @@ -104,8 +104,8 @@ ZLIB_REQUIRED=1.2.8 dnl LLVM versions LLVM_REQUIRED_GALLIUM=3.3.0 LLVM_REQUIRED_OPENCL=3.6.0 -LLVM_REQUIRED_R600=3.6.0 -LLVM_REQUIRED_RADEONSI=3.6.0 +LLVM_REQUIRED_R600=3.8.0 +LLVM_REQUIRED_RADEONSI=3.8.0 LLVM_REQUIRED_RADV=3.9.0 LLVM_REQUIRED_SWR=3.9.0 diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 0039e63e840..8996159bf22 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -792,22 +792,16 @@ ac_get_thread_id(struct ac_llvm_context *ctx) { LLVMValueRef tid; - if (HAVE_LLVM < 0x0308) { - tid = ac_build_intrinsic(ctx, "llvm.SI.tid", - ctx->i32, - NULL, 0, AC_FUNC_ATTR_READNONE); - } else { - LLVMValueRef tid_args[2]; - tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false); - tid_args[1] = LLVMConstInt(ctx->i32, 0, false); - tid_args[1] = ac_build_intrinsic(ctx, - "llvm.amdgcn.mbcnt.lo", ctx->i32, - tid_args, 2, AC_FUNC_ATTR_READNONE); - - tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", - ctx->i32, tid_args, - 2, AC_FUNC_ATTR_READNONE); - } + LLVMValueRef tid_args[2]; + tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false); + tid_args[1] = LLVMConstInt(ctx->i32, 0, false); + tid_args[1] = ac_build_intrinsic(ctx, + "llvm.amdgcn.mbcnt.lo", ctx->i32, + tid_args, 2, AC_FUNC_ATTR_READNONE); + + tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", + ctx->i32, tid_args, + 2, AC_FUNC_ATTR_READNONE); set_range_metadata(ctx, tid, 0, 64); return tid; } @@ -972,15 +966,13 @@ LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value) AC_FUNC_ATTR_READNONE); } - const char *intr = HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." : - "llvm.AMDIL.clamp."; LLVMValueRef args[3] = { value, LLVMConstReal(ctx->f32, 0), LLVMConstReal(ctx->f32, 1), }; - return ac_build_intrinsic(ctx, intr, ctx->f32, args, 3, + return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_LEGACY); } diff --git a/src/amd/common/ac_llvm_helper.cpp b/src/amd/common/ac_llvm_helper.cpp index 594339ee8c8..4f03103561e 100644 --- a/src/amd/common/ac_llvm_helper.cpp +++ b/src/amd/common/ac_llvm_helper.cpp @@ -26,10 +26,8 @@ /* based on Marek's patch to lp_bld_misc.cpp */ // Workaround http://llvm.org/PR23628 -#if HAVE_LLVM >= 0x0307 -# pragma push_macro("DEBUG") -# undef DEBUG -#endif +#pragma push_macro("DEBUG") +#undef DEBUG #include "ac_llvm_util.h" #include diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c index 4b5d2fe8ab0..a2fe631c00f 100644 --- a/src/amd/common/ac_llvm_util.c +++ b/src/amd/common/ac_llvm_util.c @@ -35,17 +35,10 @@ static void ac_init_llvm_target() { -#if HAVE_LLVM < 0x0307 - LLVMInitializeR600TargetInfo(); - LLVMInitializeR600Target(); - LLVMInitializeR600TargetMC(); - LLVMInitializeR600AsmPrinter(); -#else LLVMInitializeAMDGPUTargetInfo(); LLVMInitializeAMDGPUTarget(); LLVMInitializeAMDGPUTargetMC(); LLVMInitializeAMDGPUAsmPrinter(); -#endif } static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT; @@ -97,18 +90,11 @@ static const char *ac_get_llvm_processor_name(enum radeon_family family) return "iceland"; case CHIP_CARRIZO: return "carrizo"; -#if HAVE_LLVM <= 0x0307 - case CHIP_FIJI: - return "tonga"; - case CHIP_STONEY: - return "carrizo"; -#else case CHIP_FIJI: return "fiji"; case CHIP_STONEY: return "stoney"; -#endif -#if HAVE_LLVM <= 0x0308 +#if HAVE_LLVM == 0x0308 case CHIP_POLARIS10: return "tonga"; case CHIP_POLARIS11: diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 5a6f9606b71..26d07750f9f 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -43,7 +43,7 @@ #define HAVE_LLVM 0 #endif -#if HAVE_LLVM >= 0x0306 +#if HAVE_LLVM #include #endif @@ -793,7 +793,7 @@ static void r600_disk_cache_create(struct r600_common_screen *rscreen) if (rscreen->chip_class < SI) { res = asprintf(×tamp_str, "%u",mesa_timestamp); } -#if HAVE_LLVM >= 0x0306 +#if HAVE_LLVM else { uint32_t llvm_timestamp; if (disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo, @@ -938,9 +938,9 @@ const char *r600_get_llvm_processor_name(enum radeon_family family) case CHIP_ICELAND: return "iceland"; case CHIP_CARRIZO: return "carrizo"; case CHIP_FIJI: - return HAVE_LLVM >= 0x0308 ? "fiji" : "carrizo"; + return "fiji"; case CHIP_STONEY: - return HAVE_LLVM >= 0x0308 ? "stoney" : "carrizo"; + return "stoney"; case CHIP_POLARIS10: return HAVE_LLVM >= 0x0309 ? "polaris10" : "carrizo"; case CHIP_POLARIS11: diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index a0e90a898c5..d04abb6d203 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -128,10 +128,8 @@ si_create_llvm_target_machine(struct si_screen *sscreen) return LLVMCreateTargetMachine(si_llvm_get_amdgpu_target(triple), triple, r600_get_llvm_processor_name(sscreen->b.family), -#if HAVE_LLVM >= 0x0308 sscreen->b.debug_flags & DBG_SI_SCHED ? SI_LLVM_DEFAULT_FEATURES ",+si-scheduler" : -#endif SI_LLVM_DEFAULT_FEATURES, LLVMCodeGenLevelDefault, LLVMRelocDefault, @@ -417,10 +415,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: + case PIPE_CAP_DOUBLES: return 1; - case PIPE_CAP_DOUBLES: - return HAVE_LLVM >= 0x0307; case PIPE_CAP_INT64: case PIPE_CAP_INT64_DIVMOD: return HAVE_LLVM >= 0x0309; @@ -456,8 +453,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_FEATURE_LEVEL: if (si_have_tgsi_compute(sscreen)) return 450; - return HAVE_LLVM >= 0x0309 ? 420 : - HAVE_LLVM >= 0x0307 ? 410 : 330; + return HAVE_LLVM >= 0x0309 ? 420 : 410; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: return MIN2(sscreen->b.info.max_alloc_size, INT_MAX); @@ -577,12 +573,8 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu case PIPE_SHADER_FRAGMENT: case PIPE_SHADER_VERTEX: case PIPE_SHADER_GEOMETRY: - break; case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_EVAL: - /* LLVM 3.6.2 is required for tessellation because of bug fixes there */ - if (HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 2) - return 0; break; case PIPE_SHADER_COMPUTE: switch (param) { @@ -836,7 +828,6 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws) sscreen->b.has_streamout = true; pipe_mutex_init(sscreen->shader_parts_mutex); sscreen->use_monolithic_shaders = - HAVE_LLVM < 0x0308 || (sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0; sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 | diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index edfa2848535..ba2966124c7 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -600,7 +600,7 @@ static LLVMValueRef get_bounded_indirect_index(struct si_shader_context *ctx, * - SI & CIK hang * - VI crashes */ - if (HAVE_LLVM <= 0x0308) + if (HAVE_LLVM == 0x0308) return LLVMGetUndef(ctx->i32); return si_llvm_bound_index(ctx, result, num); diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index eeff71d5130..1e9a6046f22 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -730,8 +730,7 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base) bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl; bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi; bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.bitreverse.i32" : "llvm.AMDGPU.brev"; + bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32"; bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem; bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp; @@ -754,8 +753,7 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base) bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem; bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64"; bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.exp2.f32" : "llvm.AMDIL.exp."; + bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32"; bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem; bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32"; bld_base->op_actions[TGSI_OPCODE_FMA].emit = diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index c7cf6324e3b..5c63b732b38 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c @@ -120,18 +120,10 @@ void si_llvm_shader_type(LLVMValueRef F, unsigned type) static void init_amdgpu_target() { gallivm_init_llvm_targets(); -#if HAVE_LLVM < 0x0307 - LLVMInitializeR600TargetInfo(); - LLVMInitializeR600Target(); - LLVMInitializeR600TargetMC(); - LLVMInitializeR600AsmPrinter(); -#else LLVMInitializeAMDGPUTargetInfo(); LLVMInitializeAMDGPUTarget(); LLVMInitializeAMDGPUTargetMC(); LLVMInitializeAMDGPUAsmPrinter(); - -#endif } static once_flag init_amdgpu_target_once_flag = ONCE_FLAG_INIT; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index da9371deea0..4a4e06cc3df 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c @@ -230,14 +230,6 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) goto fail; } - /* LLVM 3.6.1 is required for VI. */ - if (ws->info.chip_class >= VI && - HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 1) { - fprintf(stderr, "amdgpu: LLVM 3.6.1 is required, got LLVM %i.%i.%i\n", - HAVE_LLVM >> 8, HAVE_LLVM & 255, MESA_LLVM_VERSION_PATCH); - goto fail; - } - /* family and rev_id are for addrlib */ switch (ws->info.family) { case CHIP_TAHITI: