From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 25 May 2019 22:21:14 +0000 (+0100)
Subject: get fake branch delay time working
X-Git-Tag: div_pipeline~1944
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e3d314651634e031bd4b18c8482c7f5838dac1d;p=soc.git

get fake branch delay time working
---

diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py
index 1cc43dcc..9f7776d5 100644
--- a/src/experiment/score6600.py
+++ b/src/experiment/score6600.py
@@ -53,7 +53,7 @@ class CompUnits(Elaboratable):
 
         # Branch ALU and CU
         self.bgt = BranchALU(self.rwid)
-        self.br1 = ComputationUnitNoDelay(self.rwid, 2, self.bgt)
+        self.br1 = ComputationUnitNoDelay(self.rwid, 3, self.bgt)
 
     def elaborate(self, platform):
         m = Module()
@@ -78,7 +78,7 @@ class CompUnits(Elaboratable):
         comb += comp2.oper_i.eq(Const(1, 2)) # op=sub
         comb += comp3.oper_i.eq(Const(2, 2)) # op=mul
         comb += comp4.oper_i.eq(Const(3, 2)) # op=shf
-        comb += br1.oper_i.eq(Const(0, 2)) # op=bgt
+        comb += br1.oper_i.eq(Const(4, 3)) # op=bgt
 
         go_rd_l = []
         go_wr_l = []