From: Ali Saidi <saidi@eecs.umich.edu>
Date: Fri, 4 Feb 2005 04:50:57 +0000 (-0500)
Subject: Add Monet configuration, update p4 parameters, couple of typo fixes
X-Git-Tag: m5_1.0_tutorial~94^2~2^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e559f6c50e38272a6f2ab46ea49394413597634;p=gem5.git

Add Monet configuration, update p4 parameters, couple of typo fixes

dev/tsunami_cchip.cc:
    add a fake register to tsunami that we can do 32bit reads to.
    Warn on access.

--HG--
extra : convert_revision : d87860f3b527528151c23431556039bca6e12945
---

diff --git a/configs/boot/devtime.rcS b/configs/boot/devtime.rcS
new file mode 100644
index 000000000..91fddc20d
--- /dev/null
+++ b/configs/boot/devtime.rcS
@@ -0,0 +1,8 @@
+insmod /modules/devtime.ko dataAddr=0x9000004 count=100
+rmmod devtime
+insmod /modules/devtime.ko dataAddr=0x1a0000300 count=100
+rmmod devtime
+insmod /modules/devtime.ko memTest=1 count=100
+rmmod devtime
+m5 exit
+
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index 823d1f118..6bf4d8b57 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -173,6 +173,13 @@ TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
 
       break;
       case sizeof(uint32_t):
+          if (regnum == TSDEV_CC_DRIR) {
+              warn("accessing DRIR with 32 bit read, "
+                   "hopefully your just reading this for timing");
+              *(uint64_t*)data = drir;
+          } else
+              panic("invalid access size(?) for tsunami register!\n");
+          return No_Fault;
       case sizeof(uint16_t):
       case sizeof(uint8_t):
       default: