From: Andreas Hansson <andreas.hansson@arm.com>
Date: Fri, 3 Jul 2015 14:14:48 +0000 (-0400)
Subject: mem: Increase the default buffer sizes for the DDR4 controller
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e711c98f8fcd949b9430bbf243d60348d0ef28b;p=gem5.git

mem: Increase the default buffer sizes for the DDR4 controller

This patch increases the default read/write buffer sizes for the DDR4
controller config to values that are more suitable for the high
bandwidth and high bank count.
---

diff --git a/src/mem/DRAMCtrl.py b/src/mem/DRAMCtrl.py
index ef187a31c..d02011526 100644
--- a/src/mem/DRAMCtrl.py
+++ b/src/mem/DRAMCtrl.py
@@ -522,6 +522,11 @@ class DDR4_2400_x64(DRAMCtrl):
     # constraints incurred by the bank groups
     banks_per_rank = 16
 
+    # override the default buffer sizes and go for something larger to
+    # accommodate the larger bank count
+    write_buffer_size = 128
+    read_buffer_size = 64
+
     # 1200 MHz
     tCK = '0.833ns'