From: Dmitry Selyutin Date: Sat, 17 Sep 2022 20:26:42 +0000 (+0300) Subject: power_fields: fix mapping class accessor X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e7e5372963a4f39564c0f9e6a0c64154702535d;p=openpower-isa.git power_fields: fix mapping class accessor --- diff --git a/src/openpower/decoder/power_fields.py b/src/openpower/decoder/power_fields.py index f69f7855..0f809a55 100644 --- a/src/openpower/decoder/power_fields.py +++ b/src/openpower/decoder/power_fields.py @@ -232,17 +232,7 @@ class MappingMeta(type): return length def __getitem__(cls, selector): - best_min = 0 - best_max = 0 - for field in cls.__members__.values(): - length = len(field) - best_min = min(best_min, length) - best_max = max(best_max, length) - - items = tuple(range(best_min, best_max)) - field = FieldMeta(cls.__name__, (Field,), {}, items=items) - - return field[selector] + return cls.__members__["_"][selector] def remap(cls, scheme): ns = {} diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 7d126bb8..2062d07a 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1302,6 +1302,7 @@ class BaseRM(_Mapping): class NormalBaseRM(BaseRM): pass + class NormalSimpleRM(NormalBaseRM): """normal: simple mode""" dz: BaseRM.mode[3]