From: Mark Janes <mark.a.janes@intel.com>
Date: Tue, 4 Jun 2019 19:45:01 +0000 (-0700)
Subject: intel/perf: create a vtable entry for store_register_mem64
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7e890ed4764d9d5927de4ee326f41e97d3bf0332;p=mesa.git

intel/perf: create a vtable entry for store_register_mem64

This method is needed to move subsequent methods into perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/intel/perf/gen_perf.h b/src/intel/perf/gen_perf.h
index 09f4ae1da64..45ca8228a80 100644
--- a/src/intel/perf/gen_perf.h
+++ b/src/intel/perf/gen_perf.h
@@ -225,6 +225,8 @@ struct gen_perf_config {
                                 const char *file, int line);
       void (*capture_frequency_stat_register)(void *ctx, void *bo,
                                               uint32_t bo_offset);
+      void (*store_register_mem64)(void *ctx, void *bo, uint32_t reg, uint32_t offset);
+
    } vtbl;
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c
index 6a8a3e4fb83..16dc7cf3f52 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -257,9 +257,9 @@ snapshot_statistics_registers(struct brw_context *brw,
 
       assert(counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64);
 
-      brw_store_register_mem64(brw, obj->pipeline_stats.bo,
-                               counter->pipeline_stat.reg,
-                               offset_in_bytes + i * sizeof(uint64_t));
+      brw->perf_ctx.perf->vtbl.store_register_mem64(brw, obj->pipeline_stats.bo,
+                                                    counter->pipeline_stat.reg,
+                                                    offset_in_bytes + i * sizeof(uint64_t));
    }
 }
 
@@ -1546,6 +1546,8 @@ brw_oa_batchbuffer_flush(void *c, const char *file, int line)
 }
 
 typedef void (*capture_frequency_stat_register_t)(void *, void *, uint32_t );
+typedef void (*store_register_mem64_t)(void *ctx, void *bo,
+                                       uint32_t reg, uint32_t offset);
 
 static unsigned
 brw_init_perf_query_info(struct gl_context *ctx)
@@ -1567,6 +1569,8 @@ brw_init_perf_query_info(struct gl_context *ctx)
    perf_cfg->vtbl.batchbuffer_flush = brw_oa_batchbuffer_flush;
    perf_cfg->vtbl.capture_frequency_stat_register =
       (capture_frequency_stat_register_t) capture_frequency_stat_register;
+   perf_cfg->vtbl.store_register_mem64 =
+      (store_register_mem64_t) brw_store_register_mem64;
 
    init_pipeline_statistic_query_registers(brw);
    gen_perf_query_register_mdapi_statistic_query(&brw->screen->devinfo,