From: Derek Hower <drh5@cs.wisc.edu>
Date: Wed, 5 Aug 2009 04:05:37 +0000 (-0500)
Subject: ruby: made mapAddressToRange based off a bit count
X-Git-Tag: Calvin_Submission~159^2~3
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7f012ef8dab812ac6dbad0ccafb8a5d22c1f3dcb;p=gem5.git

ruby: made mapAddressToRange based off a bit count
---

diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
index 8fe0d3baf..28800b2bd 100644
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -35,7 +35,7 @@
 machine(L1Cache, "Directory protocol") 
  : int request_latency, 
    int l2_select_low_bit, 
-   int l2_select_high_bit
+   int l2_select_num_bits
 {
 
   // NODE L1 CACHE
@@ -412,7 +412,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
         out_msg.Type := CoherenceRequestType:GETS;
         out_msg.Requestor := machineID;
         out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						  l2_select_low_bit, l2_select_high_bit));
+						  l2_select_low_bit, l2_select_num_bits));
         out_msg.MessageSize := MessageSizeType:Request_Control;
         out_msg.AccessMode := in_msg.AccessMode;
         out_msg.Prefetch := in_msg.Prefetch;
@@ -427,7 +427,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
         out_msg.Type := CoherenceRequestType:GETX;
         out_msg.Requestor := machineID;
         out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						  l2_select_low_bit, l2_select_high_bit));
+						  l2_select_low_bit, l2_select_num_bits));
         out_msg.MessageSize := MessageSizeType:Request_Control;
         out_msg.AccessMode := in_msg.AccessMode;
         out_msg.Prefetch := in_msg.Prefetch;
@@ -442,7 +442,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceRequestType:PUTX;
       out_msg.Requestor := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Writeback_Control;
     }
   }
@@ -454,7 +454,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceRequestType:PUTO;
       out_msg.Requestor := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Writeback_Control;
     }
   }
@@ -466,7 +466,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceRequestType:PUTS;
       out_msg.Requestor := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Writeback_Control;
     }
   }
@@ -479,7 +479,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
           out_msg.Type := CoherenceResponseType:DATA;
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						    l2_select_low_bit, l2_select_high_bit));
+						    l2_select_low_bit, l2_select_num_bits));
           out_msg.DataBlk := getCacheEntry(address).DataBlk;
           // out_msg.Dirty := getCacheEntry(address).Dirty;
           out_msg.Dirty := false;
@@ -512,7 +512,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceResponseType:DATA;
       out_msg.Sender := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.DataBlk := getCacheEntry(address).DataBlk;
       out_msg.Dirty := getCacheEntry(address).Dirty;
       out_msg.Acks := 0; // irrelevant
@@ -530,7 +530,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
           out_msg.Sender := machineID;
           out_msg.SenderMachine := MachineType:L1Cache;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						    l2_select_low_bit, l2_select_high_bit));
+						    l2_select_low_bit, l2_select_num_bits));
           out_msg.DataBlk := getCacheEntry(address).DataBlk;
           out_msg.Dirty := getCacheEntry(address).Dirty;
           out_msg.Acks := in_msg.Acks;
@@ -575,7 +575,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
           out_msg.Sender := machineID;
           out_msg.SenderMachine := MachineType:L1Cache;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						    l2_select_low_bit, l2_select_high_bit));
+						    l2_select_low_bit, l2_select_num_bits));
           out_msg.Acks := 0 - 1; // -1
           out_msg.MessageSize := MessageSizeType:Response_Control;
         }
@@ -589,7 +589,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceResponseType:UNBLOCK;
       out_msg.Sender := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Unblock_Control;
     }
   }
@@ -600,7 +600,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Type := CoherenceResponseType:UNBLOCK_EXCLUSIVE;
       out_msg.Sender := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Unblock_Control;
     }
   }
@@ -692,7 +692,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
           out_msg.Type := CoherenceResponseType:DATA;
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						    l2_select_low_bit, l2_select_high_bit));
+						    l2_select_low_bit, l2_select_num_bits));
           out_msg.DataBlk := TBEs[address].DataBlk;
           // out_msg.Dirty := TBEs[address].Dirty;
           out_msg.Dirty := false;
@@ -723,7 +723,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
           out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						    l2_select_low_bit, l2_select_high_bit));
+						    l2_select_low_bit, l2_select_num_bits));
           out_msg.DataBlk := TBEs[address].DataBlk;
           out_msg.Dirty := TBEs[address].Dirty;
           out_msg.Acks := in_msg.Acks;
@@ -741,7 +741,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L1Cache;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
-						l2_select_low_bit, l2_select_high_bit));
+						l2_select_low_bit, l2_select_num_bits));
       out_msg.Dirty := TBEs[address].Dirty;
       if (TBEs[address].Dirty) {
         out_msg.Type := CoherenceResponseType:WRITEBACK_DIRTY_DATA;
diff --git a/src/mem/ruby/config/MOESI_CMP_directory.rb b/src/mem/ruby/config/MOESI_CMP_directory.rb
index 936eb8e80..34f7c1776 100644
--- a/src/mem/ruby/config/MOESI_CMP_directory.rb
+++ b/src/mem/ruby/config/MOESI_CMP_directory.rb
@@ -26,14 +26,13 @@ class MOESI_CMP_directory_L1CacheController < L1CacheController
     num_block_bits = log_int(RubySystem.block_size_bytes)
 
     l2_select_low_bit = num_block_bits
-    l2_select_high_bit = num_block_bits + num_select_bits - 1
 
     vec = super()
     vec += " icache " + @icache.obj_name
     vec += " dcache " + @dcache.obj_name
     vec += " request_latency "+request_latency().to_s
     vec += " l2_select_low_bit " + l2_select_low_bit.to_s
-    vec += " l2_select_high_bit " + l2_select_high_bit.to_s
+    vec += " l2_select_num_bits " + num_select_bits.to_s
     return vec
   end
 end
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
index a6d99ada9..96405c8dd 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
@@ -86,10 +86,12 @@ MachineID map_Address_to_DMA(const Address & addr)
 }
 
 inline
-MachineID mapAddressToRange(const Address & addr, MachineType type, int low_bit, int high_bit)
+MachineID mapAddressToRange(const Address & addr, MachineType type, int low_bit, int num_bits)
 {
   MachineID mach = {type, 0};
-  mach.num = addr.bitSelect(low_bit, high_bit);
+  if (num_bits == 0)
+    return mach;
+  mach.num = addr.bitSelect(low_bit, low_bit+num_bits-1);
   return mach;
 }