From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 1 May 2020 21:07:33 +0000 (-0700)
Subject: Add testcase for #2010
X-Git-Tag: working-ls180~577^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7f9ecddb7f868a083ace6c82f97d80c2dd72dd29;p=yosys.git

Add testcase for #2010
---

diff --git a/tests/opt/bug2010.ys b/tests/opt/bug2010.ys
new file mode 100644
index 000000000..cef820867
--- /dev/null
+++ b/tests/opt/bug2010.ys
@@ -0,0 +1,10 @@
+read_verilog <<EOT
+module test (
+        input signed [1:0] n,
+        output [3:0] dout
+);
+        assign dout = n + 4'sd 4;
+endmodule
+EOT
+
+equiv_opt -assert opt -fine