From: Tim Newsome <tim@sifive.com>
Date: Sat, 23 Apr 2016 17:18:05 +0000 (-0700)
Subject: Clean up how Debug ROM is included.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7facb160390cbd6a1b19d62966fe5140425ee72a;p=riscv-isa-sim.git

Clean up how Debug ROM is included.

I'm not thrilled about including a static copy in so many cc files, and
making the compiler throw it out. But without really grokking the
Makefile this is the best it's going to be.
---

diff --git a/debug_rom/Makefile b/debug_rom/Makefile
new file mode 100644
index 0000000..d66b84f
--- /dev/null
+++ b/debug_rom/Makefile
@@ -0,0 +1,20 @@
+# Recursive make is bad, but in this case we're cross compiling which is a
+# pretty unusual use case.
+
+CC = $(RISCV)/bin/riscv64-unknown-elf-gcc
+OBJCOPY = $(RISCV)/bin/riscv64-unknown-elf-objcopy
+
+%.o:	%.S
+	$(CC) -c $<
+
+debug_rom.h:	debug_rom.raw
+	xxd -i $^ | sed "s/^unsigned/static const unsigned/" > $@
+
+debug_rom.raw:	debug_rom
+	$(OBJCOPY) -O binary --only-section .text debug_rom debug_rom.raw
+
+debug_rom:	debug_rom.o
+	$(CC) -nostdlib -nostartfiles -Tlink.ld -o $@ $^
+
+clean:
+	rm -f debug_rom debug_rom.o debug_rom.raw debug_rom.h
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S
new file mode 100755
index 0000000..230f4b4
--- /dev/null
+++ b/debug_rom/debug_rom.S
@@ -0,0 +1,105 @@
+# This code should be functional. Doesn't have to be optimal.
+# I'm writing it to prove that it can be done.
+
+# TODO: Update these constants once they're finalized in the doc.
+
+#define DCSR                    0x790
+#define DCSR_CAUSE_DEBINT       3
+#define DCSR_HALT_OFFSET        3
+#define DCSR_DEBUGINT_OFFSET    10
+
+#define DSCRATCH                0x792
+
+#define MCPUID                  0xf00
+#define MHARTID                 0xf10
+
+#define DEBUG_RAM               0x400
+#define DEBUG_RAM_SIZE          64
+
+#define SETHALTNOT              0x100
+#define CLEARHALTNOT            0x104
+#define CLEARDEBINT             0x108
+
+        .global entry
+        .global resume
+
+        # Automatically called when Debug Mode is first entered.
+entry:  j       _entry
+        # Should be called by Debug RAM code that has finished execution and
+        # wants to return to Debug Mode.
+resume:
+        # Clear debug interrupt.
+clear_debint:
+        csrr    s1, MHARTID
+        sw      s1, CLEARDEBINT(zero)
+clear_debint_loop:
+        csrr    s1, DCSR
+        andi    s1, s1, (1<<DCSR_DEBUGINT_OFFSET)
+        bnez    s1, wait_for_interrupt
+
+        # Restore s1.
+        csrr    s1, MCPUID
+        bltz    s1, restore_not_32
+restore_32:
+        lw      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
+        j       check_halt
+restore_not_32:
+        slli    s1, s1, 1
+        bltz    s1, restore_128
+restore_64:
+        ld      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
+        j       check_halt
+restore_128:
+        nop     #lq      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
+
+check_halt:
+        csrr    s0, DCSR
+        andi    s0, s0, (1<<DCSR_HALT_OFFSET)
+        beqz    s0, exit
+        j       wait_for_interrupt
+
+exit:
+        # Restore s0.
+        csrr    s0, DSCRATCH
+        eret
+
+
+_entry:
+        # Save s0 in DSCRATCH
+        csrw    DSCRATCH, s0
+
+        # Check why we're here
+        csrr    s0, DCSR
+        # cause is in bits 2:0 of dcsr
+        andi    s0, s0, 7
+        addi    s0, s0, -DCSR_CAUSE_DEBINT
+        bnez    s0, spontaneous_halt
+
+jdebugram:
+        # Save s1 so that the debug program can use two registers.
+        csrr    s0, MCPUID
+        bltz    s0, save_not_32
+save_32:
+        sw      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
+        jr      zero, DEBUG_RAM
+save_not_32:
+        slli    s0, s0, 1
+        bltz    s0, save_128
+save_64:
+        sd      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
+        jr      zero, DEBUG_RAM
+save_128:
+        nop     #sq      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
+        jr      zero, DEBUG_RAM
+
+spontaneous_halt:
+        csrr    s0, MHARTID
+        sw      s0, SETHALTNOT(zero)
+        csrsi   DCSR, DCSR_HALT_OFFSET
+
+wait_for_interrupt:
+        csrr    s0, DCSR
+        andi    s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
+        beqz    s0, wait_for_interrupt
+
+        j       jdebugram
diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h
new file mode 100644
index 0000000..1c53e11
--- /dev/null
+++ b/debug_rom/debug_rom.h
@@ -0,0 +1,18 @@
+static const unsigned char debug_rom_raw[] = {
+  0x6f, 0x00, 0x40, 0x05, 0xf3, 0x24, 0x00, 0xf1, 0x23, 0x24, 0x90, 0x10,
+  0xf3, 0x24, 0x00, 0x79, 0x93, 0xf4, 0x04, 0x40, 0x63, 0x94, 0x04, 0x08,
+  0xf3, 0x24, 0x00, 0xf0, 0x63, 0xc6, 0x04, 0x00, 0x83, 0x24, 0xc0, 0x43,
+  0x6f, 0x00, 0x80, 0x01, 0x93, 0x94, 0x14, 0x00, 0x63, 0xc6, 0x04, 0x00,
+  0x83, 0x34, 0x80, 0x43, 0x6f, 0x00, 0x80, 0x00, 0x13, 0x00, 0x00, 0x00,
+  0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00,
+  0x6f, 0x00, 0x40, 0x05, 0x73, 0x24, 0x20, 0x79, 0x73, 0x00, 0x00, 0x10,
+  0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x74, 0x00,
+  0x13, 0x04, 0xd4, 0xff, 0x63, 0x16, 0x04, 0x02, 0x73, 0x24, 0x00, 0xf0,
+  0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40,
+  0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00, 0x23, 0x3c, 0x90, 0x42,
+  0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x40,
+  0x73, 0x24, 0x00, 0xf1, 0x23, 0x20, 0x80, 0x10, 0x73, 0xe0, 0x01, 0x79,
+  0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x40, 0xe3, 0x0c, 0x04, 0xfe,
+  0x6f, 0xf0, 0x1f, 0xfc
+};
+static const unsigned int debug_rom_raw_len = 172;
diff --git a/debug_rom/link.ld b/debug_rom/link.ld
new file mode 100644
index 0000000..356099c
--- /dev/null
+++ b/debug_rom/link.ld
@@ -0,0 +1,11 @@
+OUTPUT_ARCH( "riscv" )
+ENTRY( entry )
+SECTIONS
+{
+    . = 0xfffff800;     /* TODO: 0x800 */
+    .text :
+    {
+        *(.text)
+    }
+    _end = .;
+}
diff --git a/riscv/debug_rom.h b/riscv/debug_rom.h
deleted file mode 100644
index d2837ac..0000000
--- a/riscv/debug_rom.h
+++ /dev/null
@@ -1,18 +0,0 @@
-static unsigned char debug_rom_raw[] = {
-  0x6f, 0x00, 0x40, 0x05, 0xf3, 0x24, 0x00, 0xf1, 0x23, 0x24, 0x90, 0x10,
-  0xf3, 0x24, 0x00, 0x79, 0x93, 0xf4, 0x04, 0x40, 0x63, 0x94, 0x04, 0x08,
-  0xf3, 0x24, 0x00, 0xf0, 0x63, 0xc6, 0x04, 0x00, 0x83, 0x24, 0xc0, 0x43,
-  0x6f, 0x00, 0x80, 0x01, 0x93, 0x94, 0x14, 0x00, 0x63, 0xc6, 0x04, 0x00,
-  0x83, 0x34, 0x80, 0x43, 0x6f, 0x00, 0x80, 0x00, 0x13, 0x00, 0x00, 0x00,
-  0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00,
-  0x6f, 0x00, 0x40, 0x05, 0x73, 0x24, 0x20, 0x79, 0x73, 0x00, 0x00, 0x10,
-  0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x74, 0x00,
-  0x13, 0x04, 0xd4, 0xff, 0x63, 0x16, 0x04, 0x02, 0x73, 0x24, 0x00, 0xf0,
-  0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40,
-  0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00, 0x23, 0x3c, 0x90, 0x42,
-  0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x40,
-  0x73, 0x24, 0x00, 0xf1, 0x23, 0x20, 0x80, 0x10, 0x73, 0xe0, 0x01, 0x79,
-  0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x40, 0xe3, 0x0c, 0x04, 0xfe,
-  0x6f, 0xf0, 0x1f, 0xfc
-};
-static unsigned int debug_rom_raw_len = 172;
diff --git a/riscv/debug_rom/Makefile b/riscv/debug_rom/Makefile
deleted file mode 100644
index ff37a29..0000000
--- a/riscv/debug_rom/Makefile
+++ /dev/null
@@ -1,20 +0,0 @@
-# Recursive make is bad, but in this case we're cross compiling which is a
-# pretty unusual use case.
-
-CC = $(RISCV)/bin/riscv64-unknown-elf-gcc
-OBJCOPY = $(RISCV)/bin/riscv64-unknown-elf-objcopy
-
-%.o:	%.S
-	$(CC) -c $<
-
-debug_rom.cc:	debug_rom.raw
-	xxd -i $^ > $@
-
-debug_rom.raw:	debug_rom
-	$(OBJCOPY) -O binary --only-section .text debug_rom debug_rom.raw
-
-debug_rom:	debug_rom.o
-	$(CC) -nostdlib -nostartfiles -Tlink.ld -o $@ $^
-
-clean:
-	rm -f debug_rom debug_rom.o debug_rom.raw debug_rom.c
diff --git a/riscv/debug_rom/debug_rom.S b/riscv/debug_rom/debug_rom.S
deleted file mode 100755
index 230f4b4..0000000
--- a/riscv/debug_rom/debug_rom.S
+++ /dev/null
@@ -1,105 +0,0 @@
-# This code should be functional. Doesn't have to be optimal.
-# I'm writing it to prove that it can be done.
-
-# TODO: Update these constants once they're finalized in the doc.
-
-#define DCSR                    0x790
-#define DCSR_CAUSE_DEBINT       3
-#define DCSR_HALT_OFFSET        3
-#define DCSR_DEBUGINT_OFFSET    10
-
-#define DSCRATCH                0x792
-
-#define MCPUID                  0xf00
-#define MHARTID                 0xf10
-
-#define DEBUG_RAM               0x400
-#define DEBUG_RAM_SIZE          64
-
-#define SETHALTNOT              0x100
-#define CLEARHALTNOT            0x104
-#define CLEARDEBINT             0x108
-
-        .global entry
-        .global resume
-
-        # Automatically called when Debug Mode is first entered.
-entry:  j       _entry
-        # Should be called by Debug RAM code that has finished execution and
-        # wants to return to Debug Mode.
-resume:
-        # Clear debug interrupt.
-clear_debint:
-        csrr    s1, MHARTID
-        sw      s1, CLEARDEBINT(zero)
-clear_debint_loop:
-        csrr    s1, DCSR
-        andi    s1, s1, (1<<DCSR_DEBUGINT_OFFSET)
-        bnez    s1, wait_for_interrupt
-
-        # Restore s1.
-        csrr    s1, MCPUID
-        bltz    s1, restore_not_32
-restore_32:
-        lw      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
-        j       check_halt
-restore_not_32:
-        slli    s1, s1, 1
-        bltz    s1, restore_128
-restore_64:
-        ld      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
-        j       check_halt
-restore_128:
-        nop     #lq      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
-
-check_halt:
-        csrr    s0, DCSR
-        andi    s0, s0, (1<<DCSR_HALT_OFFSET)
-        beqz    s0, exit
-        j       wait_for_interrupt
-
-exit:
-        # Restore s0.
-        csrr    s0, DSCRATCH
-        eret
-
-
-_entry:
-        # Save s0 in DSCRATCH
-        csrw    DSCRATCH, s0
-
-        # Check why we're here
-        csrr    s0, DCSR
-        # cause is in bits 2:0 of dcsr
-        andi    s0, s0, 7
-        addi    s0, s0, -DCSR_CAUSE_DEBINT
-        bnez    s0, spontaneous_halt
-
-jdebugram:
-        # Save s1 so that the debug program can use two registers.
-        csrr    s0, MCPUID
-        bltz    s0, save_not_32
-save_32:
-        sw      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
-        jr      zero, DEBUG_RAM
-save_not_32:
-        slli    s0, s0, 1
-        bltz    s0, save_128
-save_64:
-        sd      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 8)(zero)
-        jr      zero, DEBUG_RAM
-save_128:
-        nop     #sq      s1, (DEBUG_RAM + DEBUG_RAM_SIZE - 16)(zero)
-        jr      zero, DEBUG_RAM
-
-spontaneous_halt:
-        csrr    s0, MHARTID
-        sw      s0, SETHALTNOT(zero)
-        csrsi   DCSR, DCSR_HALT_OFFSET
-
-wait_for_interrupt:
-        csrr    s0, DCSR
-        andi    s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
-        beqz    s0, wait_for_interrupt
-
-        j       jdebugram
diff --git a/riscv/debug_rom/debug_rom.h b/riscv/debug_rom/debug_rom.h
deleted file mode 100644
index a99534e..0000000
--- a/riscv/debug_rom/debug_rom.h
+++ /dev/null
@@ -1,2 +0,0 @@
-extern unsigned char *debug_rom_raw;
-extern unsigned int debug_rom_raw_len;
diff --git a/riscv/debug_rom/link.ld b/riscv/debug_rom/link.ld
deleted file mode 100644
index 356099c..0000000
--- a/riscv/debug_rom/link.ld
+++ /dev/null
@@ -1,11 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-ENTRY( entry )
-SECTIONS
-{
-    . = 0xfffff800;     /* TODO: 0x800 */
-    .text :
-    {
-        *(.text)
-    }
-    _end = .;
-}
diff --git a/riscv/decode.h b/riscv/decode.h
index b59ee78..bf6a84c 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -14,7 +14,7 @@
 #include "config.h"
 #include "common.h"
 #include <cinttypes>
-#include "debug_rom.h"
+#include "debug_rom/debug_rom.h"
 
 typedef int64_t sreg_t;
 typedef uint64_t reg_t;