From: Jiong Wang Date: Mon, 10 Aug 2015 10:00:56 +0000 (+0000) Subject: [AArch64] Revert wrong commit of "Improve TLS Descriptor pattern to release RTL loop... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7fd8646421bbb58b11883a304665822632f2c9c1;p=gcc.git [AArch64] Revert wrong commit of "Improve TLS Descriptor pattern to release RTL loop IV opt" Revert the wrong commit of 2015-08-06 Ramana Radhakrishnan Jiong Wang * config/aarch64/aarch64.d (tlsdesc_small_pseudo_): New pattern. * config/aarch64/aarch64.h (reg_class): New enumeration FIXED_REG0. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. * config/aarch64/aarch64.c (aarch64_class_max_nregs): Likewise. (aarch64_register_move_cost): Likewise. (aarch64_load_symref_appropriately): Invoke the new added pattern if possible. * config/aarch64/constraints.md (Uc0): New constraint. From-SVN: r226756 --- diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 6da7245a853..e991a494cfc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1048,26 +1048,12 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, gcc_assert (mode == Pmode || mode == ptr_mode); - if (can_create_pseudo_p ()) - { - rtx reg = gen_reg_rtx (mode); - - if (TARGET_ILP32) - emit_insn (gen_tlsdesc_small_pseudo_si (imm, reg)); - else - emit_insn (gen_tlsdesc_small_pseudo_di (imm, reg)); - - emit_use (reg); - } + /* In ILP32, the got entry is always of SImode size. Unlike + small GOT, the dest is fixed at reg 0. */ + if (TARGET_ILP32) + emit_insn (gen_tlsdesc_small_si (imm)); else - { - /* In ILP32, the got entry is always of SImode size. Unlike - small GOT, the dest is fixed at reg 0. */ - if (TARGET_ILP32) - emit_insn (gen_tlsdesc_small_si (imm)); - else - emit_insn (gen_tlsdesc_small_di (imm)); - } + emit_insn (gen_tlsdesc_small_di (imm)); tp = aarch64_load_tp (NULL); if (mode != Pmode) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 5e8f210af03..7f997532895 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4549,23 +4549,6 @@ [(set_attr "type" "call") (set_attr "length" "16")]) -;; The same as tlsdesc_small_ except that we don't expose hard register X0 -;; as the destination of set as it will cause trouble for RTL loop iv. -;; RTL loop iv will abort ongoing optimization once it finds there is hard reg -;; as destination of set. This pattern thus could help these tlsdesc -;; instruction sequences hoisted out of loop. -(define_insn "tlsdesc_small_pseudo_" - [(set (match_operand:PTR 1 "register_operand" "=r") - (unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")] - UNSPEC_TLSDESC)) - (clobber (reg:DI R0_REGNUM)) - (clobber (reg:DI LR_REGNUM)) - (clobber (reg:CC CC_REGNUM))] - "TARGET_TLS_DESC" - "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\t0, 0, %L0\;.tlsdesccall\\t%0\;blr\\t%1" - [(set_attr "type" "call") - (set_attr "length" "16")]) - (define_insn "stack_tie" [(set (mem:BLK (scratch)) (unspec:BLK [(match_operand:DI 0 "register_operand" "rk") diff --git a/gcc/testsuite/gcc.target/aarch64/tlsdesc_hoist.c b/gcc/testsuite/gcc.target/aarch64/tlsdesc_hoist.c deleted file mode 100644 index a1fd3b0f09f..00000000000 --- a/gcc/testsuite/gcc.target/aarch64/tlsdesc_hoist.c +++ /dev/null @@ -1,22 +0,0 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target tls_native } */ -/* { dg-options "-O2 -fpic -fdump-rtl-loop2_invariant" } */ -/* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* } { "-mcmodel=large" } { "" } } */ - -int cal (int, int); -__thread int tls_data; - -int -foo (int bound) -{ - int i = 0; - int sum = 0; - - for (i; i < bound; i++) - sum = cal (sum, tls_data); - - return sum; -} - -/* Insn sequences for TLS descriptor should be hoisted out of the loop. */ -/* { dg-final { scan-rtl-dump "Decided" "loop2_invariant" } } */