From: Luke Kenneth Casson Leighton Date: Sun, 9 May 2021 19:41:22 +0000 (+0100) Subject: add comments on translation of MMU_LOOKUP X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=80252d01401180b54731a8dea310d4d63bcd2e34;p=soc.git add comments on translation of MMU_LOOKUP --- diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py index dae7dffc..5eb42eae 100644 --- a/src/soc/fu/ldst/loadstore.py +++ b/src/soc/fu/ldst/loadstore.py @@ -202,20 +202,14 @@ class LoadStore1(PortInterfaceBase): with m.Case(State.MMU_LOOKUP): ''' - if m_in.done = '1' then + if m_in.done = '1' then # actually l_out.done if r.instr_fault = '0' then # retry the request now that the MMU has - #installed a TLB entry - req := '1'; - if r.last_dword = '0' then - v.state := SECOND_REQ; - else - v.state := ACK_WAIT; - end if; + # installed a TLB entry + v.state := ACK_WAIT; end if; end if; - if m_in.err = '1' then - exception := '1'; + if m_in.err = '1' then # actually l_out.err dsisr(63 - 33) := m_in.invalid; dsisr(63 - 36) := m_in.perm_error; dsisr(63 - 38) := not r.load; @@ -230,11 +224,10 @@ class LoadStore1(PortInterfaceBase): with m.Case(State.COMPLETE): pass - exc = self.pi.exc_o - # happened, alignment, instr_fault, invalid. # note that all of these flow through - eventually to the TRAP # pipeline, via PowerDecoder2. + exc = self.pi.exc_o comb += exc.happened.eq(d_out.error | l_out.err | self.align_intr) comb += exc.invalid.eq(l_out.invalid) comb += exc.alignment.eq(self.align_intr)