From: Nathan Binkert <binkertn@umich.edu>
Date: Thu, 4 Nov 2004 03:30:13 +0000 (-0500)
Subject: Forgot about the tracing cpus for the changes to the base class
X-Git-Tag: m5_1.0_tutorial~149
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8056b9a48a730a145899f2feb48beb4a1bcc5c2e;p=gem5.git

Forgot about the tracing cpus for the changes to the base class

cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
    we don't want to register this cpu since it's not a real cpu

--HG--
extra : convert_revision : 3b87b6ac3dd061018909bf4fdb4e2d611128d07b
---

diff --git a/cpu/trace/opt_cpu.cc b/cpu/trace/opt_cpu.cc
index df4197e26..77211e382 100644
--- a/cpu/trace/opt_cpu.cc
+++ b/cpu/trace/opt_cpu.cc
@@ -48,7 +48,7 @@ OptCPU::OptCPU(const string &name,
                int block_size,
                int cache_size,
                int _assoc)
-    : BaseCPU(name,1), tickEvent(this), trace(_trace),
+    : BaseCPU(name, 1, true), tickEvent(this), trace(_trace),
       numBlks(cache_size/block_size), assoc(_assoc), numSets(numBlks/assoc),
       setMask(numSets - 1)
 {
diff --git a/cpu/trace/trace_cpu.cc b/cpu/trace/trace_cpu.cc
index b69793a4b..f1160337a 100644
--- a/cpu/trace/trace_cpu.cc
+++ b/cpu/trace/trace_cpu.cc
@@ -47,7 +47,7 @@ TraceCPU::TraceCPU(const string &name,
                    MemInterface *icache_interface,
                    MemInterface *dcache_interface,
                    MemTraceReader *data_trace)
-    : BaseCPU(name, 4), icacheInterface(icache_interface),
+    : BaseCPU(name, 4, true), icacheInterface(icache_interface),
       dcacheInterface(dcache_interface),
       dataTrace(data_trace), outstandingRequests(0), tickEvent(this)
 {