From: Eric Anholt <eric@anholt.net>
Date: Tue, 9 Oct 2012 23:59:32 +0000 (-0700)
Subject: mesa: Remove prog_instruction.h field for never-supported NV_vertex_program3.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8058a70763ff9e5b91eac8bd177c96679b5dd957;p=mesa.git

mesa: Remove prog_instruction.h field for never-supported NV_vertex_program3.

Reviewed-by: Brian Paul <brianp@vmware.com>
---

diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c
index 0a98c4acf86..efdca015e99 100644
--- a/src/mesa/main/ffvertex_prog.c
+++ b/src/mesa/main/ffvertex_prog.c
@@ -544,7 +544,6 @@ static void emit_dst( struct prog_dst_register *dst,
    dst->WriteMask = mask ? mask : WRITEMASK_XYZW;
    dst->CondMask = COND_TR;  /* always pass cond test */
    dst->CondSwizzle = SWIZZLE_NOOP;
-   dst->CondSrc = 0;
    /* Check that bitfield sizes aren't exceeded */
    ASSERT(dst->Index == reg.idx);
 }
diff --git a/src/mesa/program/prog_instruction.h b/src/mesa/program/prog_instruction.h
index 7c09cdabf0f..569294e92bf 100644
--- a/src/mesa/program/prog_instruction.h
+++ b/src/mesa/program/prog_instruction.h
@@ -313,15 +313,6 @@ struct prog_dst_register
     * Condition code swizzle value.
     */
    GLuint CondSwizzle:12;
-
-   /**
-    * Selects the condition code register to use for conditional destination
-    * update masking.  In NV_fragmnet_program or NV_vertex_program2 mode, only
-    * condition code register 0 is available.  In NV_vertex_program3 mode,
-    * condition code registers 0 and 1 are available.
-    */
-   GLuint CondSrc:1;
-   /*@}*/
 };
 
 
diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index 78d09f1cbe1..c1013a5a2af 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -789,7 +789,6 @@ _mesa_remove_extra_moves(struct gl_program *prog)
             if (prevInst->DstReg.File == PROGRAM_TEMPORARY &&
                 prevInst->DstReg.Index == id &&
                 prevInst->DstReg.RelAddr == 0 &&
-                prevInst->DstReg.CondSrc == 0 && 
                 prevInst->DstReg.CondMask == COND_TR) {
 
                const GLuint dst_mask = prevInst->DstReg.WriteMask;
diff --git a/src/mesa/program/program_parse.y b/src/mesa/program/program_parse.y
index 54b17314a3a..759c9ecd007 100644
--- a/src/mesa/program/program_parse.y
+++ b/src/mesa/program/program_parse.y
@@ -468,7 +468,6 @@ KIL_instruction: KIL swizzleSrcReg
 	   $$ = asm_instruction_ctor(OPCODE_KIL_NV, NULL, NULL, NULL, NULL);
 	   $$->Base.DstReg.CondMask = $2.CondMask;
 	   $$->Base.DstReg.CondSwizzle = $2.CondSwizzle;
-	   $$->Base.DstReg.CondSrc = $2.CondSrc;
 	   state->fragment.UsesKill = 1;
 	}
 	;
@@ -637,7 +636,6 @@ maskedDstReg: dstReg optionalMask optionalCcMask
 	   $$.WriteMask = $2.mask;
 	   $$.CondMask = $3.CondMask;
 	   $$.CondSwizzle = $3.CondSwizzle;
-	   $$.CondSrc = $3.CondSrc;
 
 	   if ($$.File == PROGRAM_OUTPUT) {
 	      /* Technically speaking, this should check that it is in
@@ -1030,7 +1028,6 @@ optionalCcMask: '(' ccTest ')'
 	{
 	   $$.CondMask = COND_TR;
 	   $$.CondSwizzle = SWIZZLE_NOOP;
-	   $$.CondSrc = 0;
 	}
 	;
 
@@ -1067,7 +1064,6 @@ ccMaskRule: IDENTIFIER
 
 	   $$.CondMask = cond;
 	   $$.CondSwizzle = SWIZZLE_NOOP;
-	   $$.CondSrc = 0;
 	}
 	;
 
@@ -1090,7 +1086,6 @@ ccMaskRule2: USED_IDENTIFIER
 
 	   $$.CondMask = cond;
 	   $$.CondSwizzle = SWIZZLE_NOOP;
-	   $$.CondSrc = 0;
 	}
 	;