From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Thu, 12 Jul 2012 17:37:50 +0000 (+0200)
Subject: bus/asmibus: fix per-port tag generation
X-Git-Tag: 24jan2021_ls180~2099^2~866
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8062e48697bba406f3ab8edec1357e9175b7d739;p=litex.git

bus/asmibus: fix per-port tag generation
---

diff --git a/migen/bus/asmibus.py b/migen/bus/asmibus.py
index d98693b6..39a60b35 100644
--- a/migen/bus/asmibus.py
+++ b/migen/bus/asmibus.py
@@ -101,9 +101,11 @@ class Port:
 				s.allocate_adr.eq(self.adr)
 			]
 		choose_slot = None
-		for s in reversed(self.slots):
+		needs_tags = len(self.slots) > 1
+		for n, s in reversed(list(enumerate(self.slots))):
 			choose_slot = If(s.state == SLOT_EMPTY,
-				s.allocate.eq(self.stb)
+				s.allocate.eq(self.stb),
+				self.tag_issue.eq(n) if needs_tags else None
 			).Else(choose_slot)
 		comb.append(choose_slot)
 		comb.append(self.ack.eq(optree("|",