From: lkcl <lkcl@web>
Date: Thu, 21 Jan 2021 15:58:28 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~393
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8062ee1241c435a41fccb0fe2cce7b0584507bc4;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd/logicops.mdwn b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
index 2fe7671a2..5de6f3325 100644
--- a/3d_gpu/architecture/dynamic_simd/logicops.mdwn
+++ b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
@@ -5,16 +5,16 @@ Links
 * <https://bugs.libre-soc.org/show_bug.cgi?id=176>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=549>
 
-These are not the same as bitwise operations equivalent to:
+These are **not** the same as bitwise logical operations equivalent to:
 
      for i in range(64):
-         result[i] = a[i] xor b[i]
+         result[i] = a[i] xor b[i] # 2 operands
 
 they are instead SIMD versions of:
 
      result = 0 # initial value (single bit)
      for i in range(64):
-         result = result xor a[i]
+         result = result xor a[i] # one operand
 
 # Requirements