From: David Alan Gilbert Date: Fri, 14 Oct 2011 14:38:30 +0000 (+0000) Subject: arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=80651d8e1cc65f26b5a2760aa965549f2b6f2dbb;p=gcc.git arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1. gcc/ 2011-10-14 David Alan Gilbert * config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1. From-SVN: r179979 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6dc80be42d9..6a141e527bd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2011-10-14 David Alan Gilbert + + * config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1. + 2011-10-14 Paolo Carlini * doc/invoke.texi ([Wformat-zero-length]): Tidy. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8ce2b3e3e97..19381fb36c2 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -288,7 +288,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void); #define TARGET_HAVE_DMB (arm_arch7) /* Nonzero if this chip implements a memory barrier via CP15. */ -#define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) +#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ + && ! TARGET_THUMB1) /* Nonzero if this chip implements a memory barrier instruction. */ #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)