From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 22 Mar 2022 17:00:39 +0000 (+0000)
Subject: add hack to modify VERSA_ECP5 85F platform to speed grade 7
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8068b38983d0091142c6ff0f88220fbcbb4a7b0c;p=ls2.git

add hack to modify VERSA_ECP5 85F platform to speed grade 7
---

diff --git a/src/ls2.py b/src/ls2.py
index 269fdb5..60aafd2 100644
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -573,6 +573,8 @@ def build_platform(fpga, firmware):
                 }.get(fpga, None)
     if platform_kls is not None:
         platform = platform_kls(toolchain=toolchain)
+        if fpga == 'versa_ecp5_85':
+            platform.speed = "7" # HACK. speed grade 7, sigh
     else:
         platform = None