From: Gabor Dozsa <gabor.dozsa@arm.com>
Date: Wed, 23 Jan 2019 15:15:16 +0000 (+0000)
Subject: cpu: Disable O3CPU value forwarding with write strobes
X-Git-Tag: v19.0.0.0~131
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=80c51fc6015420eace7eea3c82d9ddc7900da08c;p=gem5.git

cpu: Disable O3CPU value forwarding with write strobes

https://gem5-review.googlesource.com/c/public/gem5/+/19173 did the same
for MinorCPU

Change-Id: I22d631a3d2032570f6e84b0f5eb018d1f84414ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23952
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 7c3e0e026..e15d01b26 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -725,7 +725,10 @@ LSQUnit<Impl>::read(LSQRequest *req, int load_idx)
                 store_has_lower_limit && store_has_upper_limit &&
                 !req->mainRequest()->isLLSC()) {
 
-                coverage = AddrRangeCoverage::FullAddrRangeCoverage;
+                const auto& store_req = store_it->request()->mainRequest();
+                coverage = store_req->isMasked() ?
+                    AddrRangeCoverage::PartialAddrRangeCoverage :
+                    AddrRangeCoverage::FullAddrRangeCoverage;
             } else if (
                 // This is the partial store-load forwarding case where a store
                 // has only part of the load's data and the load isn't LLSC