From: lkcl Date: Thu, 30 Jun 2022 14:01:39 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~1446 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=80efc1a0c3f06979124469608fbca6bade831356;p=libreriscv.git --- diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn index 695e22466..639bb3057 100644 --- a/openpower/sv/overview.mdwn +++ b/openpower/sv/overview.mdwn @@ -91,7 +91,7 @@ The fundamentals are (just like x86 "REP"): * Once the loop is completed *only then* is the Program Counter allowed to move to the next instruction. -![image](svp64-primer/img/power_pipelines.svg) +![image](/svp64-primer/img/power_pipelines.svg) Hardware (and simulator) implementors are free and clear to implement this as literally a for-loop, sitting in between instruction decode and issue.