From: lkcl <lkcl@web>
Date: Sun, 23 Apr 2023 00:50:41 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=80f37f272e34eee56e0832da3155be44084b1fd3;p=libreriscv.git

---

diff --git a/openpower/sv/sprs.mdwn b/openpower/sv/sprs.mdwn
index dde527aaa..6653ec396 100644
--- a/openpower/sv/sprs.mdwn
+++ b/openpower/sv/sprs.mdwn
@@ -69,7 +69,7 @@ SVSTATE contains (and permits setting of):
    See table below for ordering. When `SVme` is zero (0b00000) REMAP
    is **fully disabled and inactive** regardless of the contents of
   `SVSTATE`, `mi0-mi2/mo0-mo1`, or the four `SVSHAPEn` SPRs
-* mi0-mi2/mo0-mo1 - when the corresponding SVme bit is enabled, these
+* mi0-mi2/mo0-mo1 - these
   indicate the SVSHAPE (0-3) that the corresponding register (RA etc)
   should use, as long as the register's corresponding SVme bit is set