From: Jean THOMAS <git0@pub.jeanthomas.me>
Date: Mon, 27 Jul 2020 16:54:23 +0000 (+0200)
Subject: Import Delay in gram tests
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=811a568e151bc04312d48f78ef7f084dc056912b;p=gram.git

Import Delay in gram tests
---

diff --git a/gram/test/utils.py b/gram/test/utils.py
index 6712429..aa22a39 100644
--- a/gram/test/utils.py
+++ b/gram/test/utils.py
@@ -9,13 +9,13 @@ import warnings
 from contextlib import contextmanager
 
 from nmigen import *
-from nmigen.back.pysim import *
+from nmigen.sim.pysim import *
 from nmigen.hdl.ir import Fragment
 from nmigen.back import rtlil
 from nmigen._toolchain import require_tool
 
 
-__all__ = ["FHDLTestCase", "runSimulation", "wb_read", "wb_write", "PulseCounter"]
+__all__ = ["FHDLTestCase", "runSimulation", "wb_read", "wb_write", "PulseCounter", "Delay"]
 
 def runSimulation(module, process, vcd_filename="anonymous.vcd", clock=1e-6):
     sim = Simulator(module)