From: Clifford Wolf Date: Sun, 27 Jan 2019 08:23:41 +0000 (+0100) Subject: Merge pull request #800 from whitequark/write_verilog_tribuf X-Git-Tag: yosys-0.9~320 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=81581f24fc88ec67093c330d145bb52badead85d;p=yosys.git Merge pull request #800 from whitequark/write_verilog_tribuf write_verilog: write $tribuf cell as ternary --- 81581f24fc88ec67093c330d145bb52badead85d