From: Zhenyu Wang <zhenyuw@linux.intel.com>
Date: Sun, 26 Sep 2010 05:13:32 +0000 (+0800)
Subject: i965: fix const register count for sandybridge
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=81aae67e58f7c3123724e629a81e2c937864e3be;p=mesa.git

i965: fix const register count for sandybridge

Sandybridge's PS constant buffer payload size is decided from
push const buffer command, incorrect size would cause wrong data
in payload for position and vertex attributes. This fixes coefficients
for tex2d/tex3d.
---

diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 1cbd5d2b55a..55aceea9b5c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -342,8 +342,8 @@ static void prealloc_reg(struct brw_wm_compile *c)
               }
            }
            /* number of constant regs used (each reg is float[8]) */
-           c->nr_creg = 2 * ((4 * nr_params + 15) / 16);
-           reg_index += c->nr_creg;
+	   c->nr_creg = ALIGN(nr_params, 2) / 2;
+	   reg_index += c->nr_creg;
         }
     }