From: Giacomo Travaglini Date: Wed, 12 Aug 2020 14:12:58 +0000 (+0100) Subject: arch-arm: Rename SelfDebug member variables X-Git-Tag: v20.1.0.0~293 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=81ad7e66db57de462ab697ee7faf0974f1c55d91;p=gem5.git arch-arm: Rename SelfDebug member variables * enableFlag -> mde The "enableFlag" variable, enabling the Breakpoint, Watchpoint, Vector Catch exceptions is actually the cached version of MDSCR_EL1.MDE. The "enableFlag" name looks too general as it's not covering the Software Step exception case. * bKDE -> kde * bSDD -> sdd The b prefix was likely referring to "breakpoint". However these bitfields are actually used by watchpoints as well. Change-Id: I48b762b32b2d763f4c4ceb7dcc28968cfb470fc1 Signed-off-by: Giacomo Travaglini Reviewed-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32775 Tested-by: kokoro Reviewed-by: Richard Cooper --- diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc index 21ad84c37..e55df64ad 100644 --- a/src/arch/arm/self_debug.cc +++ b/src/arch/arm/self_debug.cc @@ -72,7 +72,7 @@ SelfDebug::testDebug(ThreadContext *tc, const RequestPtr &req, Fault SelfDebug::testBreakPoints(ThreadContext *tc, Addr vaddr) { - if (!enableFlag) + if (!mde) return NoFault; setAArch32(tc); @@ -127,7 +127,7 @@ SelfDebug::testWatchPoints(ThreadContext *tc, Addr vaddr, bool write, to32 = targetAArch32(tc); if (!initialized) init(tc); - if (!isDebugEnabled(tc) || !enableFlag) + if (!isDebugEnabled(tc) || !mde) return NoFault; ExceptionLevel el = (ExceptionLevel) currEL(tc); @@ -168,12 +168,12 @@ SelfDebug::isDebugEnabledForEL64(ThreadContext *tc, ExceptionLevel el, (!secure || HaveSecureEL2Ext(tc)) && enableTdeTge; ExceptionLevel target_el = route_to_el2 ? EL2 : EL1; - if (oslk || (bSDD && secure && ArmSystem::haveEL(tc, EL3))) { + if (oslk || (sdd && secure && ArmSystem::haveEL(tc, EL3))) { return false; } if (el == target_el) { - return bKDE && !mask; + return kde && !mask; } else { return target_el > el; } @@ -720,7 +720,7 @@ SelfDebug::testVectorCatch(ThreadContext *tc, Addr addr, to32 = targetAArch32(tc); if (!initialized) init(tc); - if (!isDebugEnabled(tc) || !enableFlag || !aarch32) + if (!isDebugEnabled(tc) || !mde || !aarch32) return NoFault; ExceptionLevel el = (ExceptionLevel) currEL(tc); diff --git a/src/arch/arm/self_debug.hh b/src/arch/arm/self_debug.hh index c9afa609f..2ae2f8ec7 100644 --- a/src/arch/arm/self_debug.hh +++ b/src/arch/arm/self_debug.hh @@ -167,8 +167,7 @@ class WatchPoint inline Addr getAddrfromReg(ThreadContext *tc) { - return bits(tc->readMiscReg(valRegIndex), maxAddrSize, 0); - + return bits(tc->readMiscReg(valRegIndex), maxAddrSize, 0); } inline bool @@ -282,11 +281,9 @@ class SelfDebug bool initialized; bool enableTdeTge; // MDCR_EL2.TDE || HCR_EL2.TGE - // THIS is MDSCR_EL1.MDE in aarch64 and DBGDSCRext.MDBGen in aarch32 - bool enableFlag; - - bool bSDD; // MDCR_EL3.SDD - bool bKDE; // MDSCR_EL1.KDE + bool mde; // MDSCR_EL1.MDE, DBGDSCRext.MDBGen + bool sdd; // MDCR_EL3.SDD + bool kde; // MDSCR_EL1.KDE bool oslk; // OS lock flag bool aarch32; // updates with stage1 aarch64/32 @@ -295,7 +292,7 @@ class SelfDebug public: SelfDebug() : initialized(false), enableTdeTge(false), - enableFlag(false), bSDD(false), bKDE(false), oslk(false) + mde(false), sdd(false), kde(false), oslk(false) { softStep = new SoftwareStep(this); } @@ -320,6 +317,8 @@ class SelfDebug public: Fault testVectorCatch(ThreadContext *tc, Addr addr, ArmFault* flt); + bool enabled() const { return mde || softStep->bSS; }; + inline BrkPoint* getBrkPoint(uint8_t index) { @@ -373,21 +372,21 @@ class SelfDebug inline void setbSDD(RegVal val) { - bSDD = bits(val, 16); + sdd = bits(val, 16); } inline void setMDSCRvals(RegVal val) { - enableFlag = bits(val, 15); - bKDE = bits(val, 13); + mde = bits(val, 15); + kde = bits(val, 13); softStep->bSS = bits(val, 0); } inline void setMDBGen(RegVal val) { - enableFlag = bits(val, 15); + mde = bits(val, 15); } inline void