From: lkcl <lkcl@web>
Date: Tue, 30 Mar 2021 12:38:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~1090
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=81bee4588c05f65c47df2268c161554d3b11043a;p=libreriscv.git

---

diff --git a/HDL_workflow/litex_ls180.mdwn b/HDL_workflow/litex_ls180.mdwn
index f2e9bd3a4..39e3c5577 100644
--- a/HDL_workflow/litex_ls180.mdwn
+++ b/HDL_workflow/litex_ls180.mdwn
@@ -11,11 +11,16 @@ the following have been identified as working with sim.py.  dependencies:
     apt-get install libevent-dev
     apt-get install verilator
 
+# build process for litex sim
+
+very simple:
+
+    make run_sim
+
 # build process for ls180
 
 for the variant without 4k srams:
 
-    standard install (see [[HDL_workflow]]
     cd soc
     make ls180_verilog
     cd src/soc/litex/florent