From: lkcl <lkcl@web>
Date: Fri, 23 Sep 2022 13:36:41 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~319
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=82062f49944690460394e2060651efb2c58113f4;p=libreriscv.git

---

diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn
index 59bf196c0..891dd6ee7 100644
--- a/openpower/sv/overview/discussion.mdwn
+++ b/openpower/sv/overview/discussion.mdwn
@@ -90,3 +90,15 @@ context is:
 
 The reason is that as in the above 8/16 table, the ordering of bytes, which
 become synonymous with elements, become inverted.
+
+The "correct" fix to this problem is to view arithmetic LE/BE-reversing
+(reading/writing to/from the regfile on the way into and out of
+Arithmetic Operations) as **completely separate and distinct** from
+**Memory** LE/BE reordering, which a quick check on an IBM POWER8/9/10
+system using VSX arithmetic operations on 8/16 in BE order will confirm
+is already considered.
+
+The "correct" place to add such reversing would be the `REMAP`
+subsystem but the number of available bits is already under
+pressure so some care is needed. Even better would be the 24-bit
+RM but that is also precious and under pressure.