From: colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Date: Wed, 4 Nov 2020 00:27:06 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~1876
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=820696054fb74311067715e624781449b807d524;p=libreriscv.git

---

diff --git a/HDL_workflow/coriolis2.mdwn b/HDL_workflow/coriolis2.mdwn
index c3da71a24..0f41ec594 100644
--- a/HDL_workflow/coriolis2.mdwn
+++ b/HDL_workflow/coriolis2.mdwn
@@ -234,7 +234,7 @@ You must create a configuration for your user in alliance-check-toolkit to defin
 
 You can try the ARM in alliance-check-toolkit:
 
-    cd alliance-check-toolkit/benchsARM/cmos/
+    cd alliance-check-toolkit/benchs/ARM/cmos/
     make lvx
 
 This should take about five minutes. It's symbolic, but should be a configuration compatible with 180nm. To actually see the results: