From: Andrew Cagney Date: Sat, 21 Nov 1998 03:31:30 +0000 (+0000) Subject: * r5900.igen (CVT.W.S): Always round towards zero. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=821b702f92c049761c98c1c98126e49a3c45ac69;p=binutils-gdb.git * r5900.igen (CVT.W.S): Always round towards zero. Update testsuite. --- diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 4176bd57bac..67393edfe76 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +start-sanitize-r5900 +Mon Nov 16 11:44:24 1998 Andrew Cagney + + * r5900.igen (CVT.W.S): Always round towards zero. + +end-sanitize-r5900 Sat Nov 7 09:54:38 1998 Andrew Cagney * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK