From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 17:58:06 +0000 (-0500)
Subject: ARM: Fix signed most significant multiply instructions.
X-Git-Tag: stable_2012_02_02~1264
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=82614b6f3ae8e73ae972bc9df5736271a8af3e5f;p=gem5.git

ARM: Fix signed most significant multiply instructions.
---

diff --git a/src/arch/arm/isa/insts/mult.isa b/src/arch/arm/isa/insts/mult.isa
index 4b42e6c89..13c9df07b 100644
--- a/src/arch/arm/isa/insts/mult.isa
+++ b/src/arch/arm/isa/insts/mult.isa
@@ -284,29 +284,33 @@ let {{
                                   ''')
     buildMult4InstUnCc("smmla", '''Reg0 = resTemp =
                                        ((int64_t)(Reg3.ud << 32) +
-                                        Reg1.sw * Reg2.sw) >> 32;
+                                        (int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult4InstUnCc("smmlar", '''Reg0 = resTemp =
                                         ((int64_t)(Reg3.ud << 32) +
-                                         Reg1.sw * Reg2.sw +
+                                         (int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult4InstUnCc("smmls", '''Reg0 = resTemp =
                                        ((int64_t)(Reg3.ud << 32) -
-                                        Reg1.sw * Reg2.sw) >> 32;
+                                        (int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult4InstUnCc("smmlsr", '''Reg0 = resTemp =
                                         ((int64_t)(Reg3.ud << 32) -
-                                         Reg1.sw * Reg2.sw +
+                                         (int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult3InstUnCc("smmul", '''Reg0 = resTemp =
-                                       ((int64_t)Reg1 *
-                                        (int64_t)Reg2) >> 32;
+                                       ((int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult3InstUnCc("smmulr", '''Reg0 = resTemp =
-                                        ((int64_t)Reg1 *
-                                         (int64_t)Reg2 +
+                                        ((int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult3InstCc  ("smuad", '''Reg0 = resTemp =