From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 20 Sep 2019 15:56:16 +0000 (-0700)
Subject: Revert "Move mul2dsp before wreduce"
X-Git-Tag: working-ls180~1039^2~62
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=829e4f5d2c8a521b5e4f80e85b9d58191d64f0d5;p=yosys.git

Revert "Move mul2dsp before wreduce"

This reverts commit e4f4f6a9d5cf8bb23870fc483f16f66c80ceebab.
---

diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 225603475..284bc90d0 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -265,10 +265,6 @@ struct SynthIce40Pass : public ScriptPass
 			run("opt_clean");
 			run("check");
 			run("opt");
-			if (help_mode || dsp)
-				run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 "
-						"-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 "
-						"-D DSP_NAME=$__MUL16X16", "(if -dsp)");
 			run("wreduce");
 			run("peepopt");
 			run("opt_clean");
@@ -277,6 +273,11 @@ struct SynthIce40Pass : public ScriptPass
 			run("opt_expr");
 			run("opt_clean");
 			if (help_mode || dsp) {
+				run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 "
+						"-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 "
+						"-D DSP_NAME=$__MUL16X16", "(if -dsp)");
+				run("opt_expr -fine", "               (if -dsp)");
+				run("wreduce", "                      (if -dsp)");
 				run("ice40_dsp", "                    (if -dsp)");
 				run("chtype -set $mul t:$__soft_mul","(if -dsp)");
 			}