From: mfortune Date: Tue, 20 May 2014 11:45:47 +0000 (+0100) Subject: Mark MSA as requiring FP64 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=82bda27b2f439498b5c8b4941d8d47bdfe916688;p=binutils-gdb.git Mark MSA as requiring FP64 gas/ * config/tc-mips.c (FP64_ASES): Add ASE_MSA. (mips_after_parse_args): Do not select ASE_MSA without -mfp64. gas/testsuite/ * gas/mips/micromips@msa-branch.d: Rework expected output for fp64. * gas/mips/msa-branch.d: Likewise. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 0616ad548a4..130b287f173 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2014-05-20 Matthew Fortune + + * config/tc-mips.c (FP64_ASES): Add ASE_MSA. + (mips_after_parse_args): Do not select ASE_MSA without -mfp64. + 2014-05-20 Mike Stump * messages.c (as_warn_internal): Ensure we don't interleave output diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 95ffe504554..dbf9c6eac4c 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -1643,7 +1643,7 @@ static const struct mips_ase mips_ases[] = { }; /* The set of ASEs that require -mfp64. */ -#define FP64_ASES (ASE_MIPS3D | ASE_MDMX) +#define FP64_ASES (ASE_MIPS3D | ASE_MDMX | ASE_MSA) /* Groups of ASE_* flags that represent different revisions of an ASE. */ static const unsigned int mips_ase_groups[] = { @@ -14021,7 +14021,7 @@ mips_after_parse_args (void) file_mips_opts.fp = 64; else if ((mips_opts.ase & FP64_ASES) && ISA_HAS_64BIT_FPRS (mips_opts.isa)) - /* -mips3d and -mdmx imply 64-bit float registers, if possible. */ + /* Handle ASEs that require 64-bit float registers, if possible. */ file_mips_opts.fp = 64; else /* 32-bit float registers. */ @@ -14063,10 +14063,10 @@ mips_after_parse_args (void) mips_opts.micromips = (CPU_HAS_MICROMIPS (file_mips_opts.arch)) ? 1 : 0; - /* MIPS3D and MDMX require 64-bit FPRs, so -mfp32 should stop those + /* MIPS3D, MDMX and MSA require 64-bit FPRs, so -mfp32 should stop those ASEs from being selected implicitly. */ if (file_mips_opts.fp != 64) - file_ase_explicit |= ASE_MIPS3D | ASE_MDMX; + file_ase_explicit |= ASE_MIPS3D | ASE_MDMX | ASE_MSA; /* If the user didn't explicitly select or deselect a particular ASE, use the default setting for the CPU. */ diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index a9c1a8a7eaa..007b167a34f 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-05-20 Matthew Fortune + + * gas/mips/micromips@msa-branch.d: Rework expected output for fp64. + * gas/mips/msa-branch.d: Likewise. + 2014-05-20 Nick Clifton * gas/elf/struct.d: Expect extra output from some toolchains. diff --git a/gas/testsuite/gas/mips/micromips@msa-branch.d b/gas/testsuite/gas/mips/micromips@msa-branch.d index 6c8fdb7b153..8b22b9e0588 100644 --- a/gas/testsuite/gas/mips/micromips@msa-branch.d +++ b/gas/testsuite/gas/mips/micromips@msa-branch.d @@ -30,10 +30,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8300 fffe bz\.b \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8301 fffe bz\.b \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8302 fffe bz\.b \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -61,10 +60,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8320 fffe bz\.h \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8321 fffe bz\.h \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8322 fffe bz\.h \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -92,10 +90,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8340 fffe bz\.w \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8341 fffe bz\.w \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8342 fffe bz\.w \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -123,10 +120,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8360 fffe bz\.d \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8361 fffe bz\.d \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8362 fffe bz\.d \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -154,10 +150,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8160 fffe bz\.v \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8161 fffe bz\.v \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8162 fffe bz\.v \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -185,10 +180,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 8380 fffe bnz\.b \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8381 fffe bnz\.b \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 8382 fffe bnz\.b \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -216,10 +210,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 83a0 fffe bnz\.h \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83a1 fffe bnz\.h \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83a2 fffe bnz\.h \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -247,10 +240,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 83c0 fffe bnz\.w \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83c1 fffe bnz\.w \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83c2 fffe bnz\.w \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -278,10 +270,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 83e0 fffe bnz\.d \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83e1 fffe bnz\.d \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 83e2 fffe bnz\.d \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 @@ -309,10 +300,9 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 81e0 fffe bnz\.v \$w0,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 0c00 nop -[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 81e1 fffe bnz\.v \$w1,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test -[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 [0-9a-f]+ <[^>]*> 81e2 fffe bnz\.v \$w2,[0-9a-f]+ <[^>]*> [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test [0-9a-f]+ <[^>]*> 5482 0130 add\.d \$f0,\$f2,\$f4 diff --git a/gas/testsuite/gas/mips/msa-branch.d b/gas/testsuite/gas/mips/msa-branch.d index 567a2a4c949..fbab5cce0a8 100644 --- a/gas/testsuite/gas/mips/msa-branch.d +++ b/gas/testsuite/gas/mips/msa-branch.d @@ -6,223 +6,213 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 7aa2081c fsune\.d \$w0,\$w1,\$w2 -[0-9a-f]+ <[^>]*> 4700fffe bz\.b \$w0,[0-9a-f]+ +[0-9a-f]+ <[^>]*> 4700.... bz\.b \$w0,[0-9a-f]+ [0-9a-f]+ <[^>]*> 00000000 nop -[0-9a-f]+ <[^>]*> 4701fffc bz\.b \$w1,[0-9a-f]+ +[0-9a-f]+ <[^>]*> 4701.... bz\.b \$w1,[0-9a-f]+ [0-9a-f]+ <[^>]*> 7aa2081c fsune\.d \$w0,\$w1,\$w2 -[0-9a-f]+ <[^>]*> 4702fffa bz\.b \$w2,[0-9a-f]+ +[0-9a-f]+ <[^>]*> 4702.... bz\.b \$w2,[0-9a-f]+ [0-9a-f]+ <[^>]*> 7aa2081c fsune\.d \$w0,\$w1,\$w2 [0-9a-f]+ <[^>]*> 46020800 add\.s \$f0,\$f1,\$f2 -[0-9a-f]+ <[^>]*> 4700fff7 bz\.b \$w0,[0-9a-f]+ +[0-9a-f]+ <[^>]*> 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<[^>]*> 45e2.... bnz\.v \$w2,[0-9a-f]+ [0-9a-f]+ <[^>]*> 46241000 add\.d \$f0,\$f2,\$f4 \.\.\.