From: Nathan Binkert <binkertn@umich.edu>
Date: Wed, 24 Mar 2004 07:59:43 +0000 (-0500)
Subject: ULL()
X-Git-Tag: m5_1.0_beta2~72
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=832a0917cf28d09520c1d2ac60921c4e034f7c26;p=gem5.git

ULL()

--HG--
extra : convert_revision : 543313ec248457e6cb2f8315881f030545e8cf45
---

diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 2f0dcfecf..d1b152f73 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -92,7 +92,7 @@ AlphaTlb::checkCacheability(MemReqPtr &req)
             // IPR memory space not implemented
             if (!req->xc->misspeculating()) {
                 switch (req->paddr) {
-                  case 0xFFFFF00188:
+                  case ULL(0xFFFFF00188):
                     req->data = 0;
                     break;