From: Lukasz Dalek <ldalek@antmicro.com>
Date: Fri, 17 Jul 2020 11:41:09 +0000 (+0200)
Subject: Rewrite multirange arrays sizes [n] as [n-1:0]
X-Git-Tag: working-ls180~273^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=83ddc62034dc5c7046a1ba7c5666e868b8346538;p=yosys.git

Rewrite multirange arrays sizes [n] as [n-1:0]

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
---

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 63f0341d9..8e5236639 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -210,14 +210,23 @@ static AstNode *checkRange(AstNode *type_node, AstNode *range_node)
 	return range_node;
 }
 
-static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode)
+static void rewriteRange(AstNode *rangeNode)
 {
-	node->type = AST_MEMORY;
 	if (rangeNode->type == AST_RANGE && rangeNode->children.size() == 1) {
 		// SV array size [n], rewrite as [n-1:0]
 		rangeNode->children[0] = new AstNode(AST_SUB, rangeNode->children[0], AstNode::mkconst_int(1, true));
 		rangeNode->children.push_back(AstNode::mkconst_int(0, false));
 	}
+}
+
+static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode)
+{
+	node->type = AST_MEMORY;
+	if (rangeNode->type == AST_MULTIRANGE) {
+		for (auto *itr : rangeNode->children)
+			rewriteRange(itr);
+	} else
+		rewriteRange(rangeNode);
 	node->children.push_back(rangeNode);
 }