From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 9 Jun 2018 02:52:06 +0000 (+0100)
Subject: reorg
X-Git-Tag: convert-csv-opcode-to-binary~5243
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=83ee4d72709be935cb2a1c3c87b66ca14a28dab2;p=libreriscv.git

reorg
---

diff --git a/simple_v_extension/simple_v_chennai_2018.tex b/simple_v_extension/simple_v_chennai_2018.tex
index 22201be2d..f39d02355 100644
--- a/simple_v_extension/simple_v_chennai_2018.tex
+++ b/simple_v_extension/simple_v_chennai_2018.tex
@@ -729,14 +729,6 @@ loop:
 }
 
 
-\frame{\frametitle{Is this OK (low latency)? Detect scalar-ops (only)}
- \begin{center}
-  \includegraphics[height=2.5in]{scalardetect.png}\\
-  {\bf \red Detect when all registers are scalar for a given op}
- \end{center}
-}
-
-
 \frame{\frametitle{Summary}
 
  \begin{itemize}