From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 21 Aug 2013 16:47:06 +0000 (-0700)
Subject: Merge pull request #10 from hansiglaser/master
X-Git-Tag: yosys-0.2.0~490
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8409956c0c1b96b69f7b43085a9fe943f23a597f;p=yosys.git

Merge pull request #10 from hansiglaser/master

fixed Verilog parser filename and line numbering issue with include files
---

8409956c0c1b96b69f7b43085a9fe943f23a597f