From: whitequark Date: Sat, 3 Aug 2019 16:28:57 +0000 (+0000) Subject: Update all boards to use default_rst. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84321d8cd0102a1ad8edbb6cc55966711b52629a;p=nmigen-boards.git Update all boards to use default_rst. This is pretty much just Versa ECP5 (5G). --- diff --git a/nmigen_boards/versa_ecp5.py b/nmigen_boards/versa_ecp5.py index 4b2b9f0..4462e4d 100644 --- a/nmigen_boards/versa_ecp5.py +++ b/nmigen_boards/versa_ecp5.py @@ -14,6 +14,7 @@ class VersaECP5Platform(LatticeECP5Platform): package = "BG381" speed = "8" default_clk = "clk100" + default_rst = "rst" resources = [ Resource("rst", 0, PinsN("T1", dir="i"), Attrs(IO_TYPE="LVCMOS33")), Resource("clk100", 0, DiffPairs("P3", "P4", dir="i"),