From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Tue, 26 May 2020 17:22:35 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=8446f87e840357d33af9966a2d881ba12a19f5e3;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
---

diff --git a/26/5e84245a013ccca391b835386171fe8724938b b/26/5e84245a013ccca391b835386171fe8724938b
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+Date: Tue, 26 May 2020 17:22:35 +0000
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+Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA
+ (src1) can be zero
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