From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Tue, 28 Apr 2020 17:49:24 +0000 (-0400)
Subject: pan/bit: Interpret BI_BITWISE
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=844c3f94b5b9092c3fa904a0034883def6c177af;p=mesa.git

pan/bit: Interpret BI_BITWISE

No shifting yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
---

diff --git a/src/panfrost/bifrost/test/bi_interpret.c b/src/panfrost/bifrost/test/bi_interpret.c
index f83f76d1b99..eaa3327430c 100644
--- a/src/panfrost/bifrost/test/bi_interpret.c
+++ b/src/panfrost/bifrost/test/bi_interpret.c
@@ -437,8 +437,28 @@ bit_step(struct bit_state *s, bi_instruction *ins, bool FMA)
                 break;
         }
 
-        case BI_BITWISE:
-                unreachable("Unsupported op");
+        case BI_BITWISE: {
+                /* Apply inverts first */
+                if (ins->bitwise.src_invert[0])
+                        srcs[0].u64 = ~srcs[0].u64;
+
+                if (ins->bitwise.src_invert[1])
+                        srcs[1].u64 = ~srcs[1].u64;
+
+                /* TODO: Shifting */
+                assert(srcs[2].u32 == 0);
+
+                if (ins->op.bitwise == BI_BITWISE_AND)
+                        dest.u64 = srcs[0].u64 & srcs[1].u64;
+                else if (ins->op.bitwise == BI_BITWISE_OR)
+                        dest.u64 = srcs[0].u64 | srcs[1].u64;
+                else if (ins->op.bitwise == BI_BITWISE_XOR)
+                        dest.u64 = srcs[0].u64 ^ srcs[1].u64;
+                else
+                        unreachable("Unsupported op");
+
+                break;
+         }
 
         case BI_CONVERT: {
                 /* If it exists */