From: Paul Brook <paul@codesourcery.com>
Date: Tue, 15 Jun 2004 15:25:52 +0000 (+0000)
Subject: * gcc.dg/arm-mmx-1.c: Use asm to clobber registers.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=844f5ccfbb1871ca4540de222210d364c5ce304b;p=gcc.git

* gcc.dg/arm-mmx-1.c: Use asm to clobber registers.

From-SVN: r83189
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 79a84175526..dc1100d2e3b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2004-06-15  Paul Brook  <paul@codesourcery.com>
+
+	* gcc.dg/arm-mmx-1.c: Use asm to clobber registers.
+
 2004-06-14  Giovanni Bajo  <giovannibajo@gcc.gnu.org>
 
 	PR c++/15967
diff --git a/gcc/testsuite/gcc.dg/arm-mmx-1.c b/gcc/testsuite/gcc.dg/arm-mmx-1.c
index 361ad2c057b..f93b9a35b71 100644
--- a/gcc/testsuite/gcc.dg/arm-mmx-1.c
+++ b/gcc/testsuite/gcc.dg/arm-mmx-1.c
@@ -5,22 +5,15 @@
 /* { dg-final { global compiler_flags; if ![string match "*-mthumb *" $compiler_flags] { scan-assembler "ldmfd\[ 	]sp!.*ip,\[ ]*pc" } } } */
 
 /* This function uses all the call-saved registers, namely r4, r5, r6,
-   r7, r8, r9, sl, fp.  Since we also save pc, that leaves an odd
+   r7, r8, r9, sl, fp.  Since we also save lr, that leaves an odd
    number of registers, and the compiler will push ip to align the
    stack.  Make sure that we restore ip into ip, not into sp as is
    done when using a frame pointer.  The -mno-apcs-frame option
    permits the frame pointer to be used as an ordinary register.  */
-int
-foo(int *a, int *b, int *c, int *d, int *tot)
-{
-  int i, j, k, l, m, n, o;
 
-  *tot = 0;
-  for (i = *a; i < *b; i += *c)
-    for (j = *a; j < *b; j += *d)
-      for (k = *a; k < *c; k += *d)
-	for (l = *b; k < *c; k += *d)
-	  for (m = *d; k < *c; k += *b)
-	    *tot += i + j + k + l + m;
-  return *tot;
+void
+foo(void)
+{
+  __asm volatile ("" : : :
+		  "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
 }