From: lkcl <lkcl@web>
Date: Fri, 6 May 2022 13:14:15 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2373
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=846289e67d131376bdd63ee1c923023997ee38a0;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 4d8f5a817..a6beeb2c5 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -552,9 +552,19 @@ The similarity to ZOLC should not have gone unnoticed: where ZOLC
 has nested conditional for-loops Extra-V appears to have just the
 one conditional for-loop, but the key strategically-crucial
 part of this multi-faceted puzzle is that due to the deterministic and
-coherent nature of Extra-V, the processing of the loops is not
-done close to the CPU it is
+coherent nature of Extra-V, the processing of the loops, which
+requires a tiny processor, is not
+done close to the CPU at all: it is
 *embedded right next to the memory*.
 
+The similarity to the D-Matrix Systolic Array Processing, Aspex Microelectronics
+Array-String Processing, and Elixent 2D Array Processing, should
+also not have gone unnoticed.  All of these solutions utilised
+or utilise
+a more comprehensive Turing-complete von-Neumann "Management Core"
+to coordinate data passed in and out of PEs: none of them had or
+had something
+as powerful as OpenCAPI as part of that picture.
+
 **Snitch**