From: Prathamesh Kulkarni Date: Wed, 21 Aug 2019 18:34:43 +0000 (+0000) Subject: re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=846f78d414101dbd33ff9c370d379bae73ae0efa;p=gcc.git re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve) 2019-08-21 Prathamesh Kulkarni PR target/90724 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y in reg if it fails aarch64_plus_operand predicate. From-SVN: r274805 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7550e422dad..e5ae7ad86e3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-08-21 Prathamesh Kulkarni + + PR target/90724 + * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y + in reg if it fails aarch64_plus_operand predicate. + 2019-08-21 Richard Biener PR tree-optimization/91482 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 146d0201f50..23f72160fbb 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -2070,6 +2070,9 @@ aarch64_gen_compare_reg_maybe_ze (RTX_CODE code, rtx x, rtx y, } } + if (!aarch64_plus_operand (y, y_mode)) + y = force_reg (y_mode, y); + return aarch64_gen_compare_reg (code, x, y); }