From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 17 Dec 2018 16:16:10 +0000 (+0100)
Subject: Merge pull request #746 from Icenowy/anlogic-dram
X-Git-Tag: yosys-0.9~366
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=847fd360773d72933f1c728dba0755e0033350a6;p=yosys.git

Merge pull request #746 from Icenowy/anlogic-dram

Support for DRAM inferring on Anlogic FPGAs
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847fd360773d72933f1c728dba0755e0033350a6