From: Uros Bizjak <uros@gcc.gnu.org>
Date: Tue, 25 Sep 2018 16:06:36 +0000 (+0200)
Subject: * config/i386/i386.md: Move nearbyint patterns closer to rint.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84848f51990785a127c32236be63c10e579a9332;p=gcc.git

* config/i386/i386.md: Move nearbyint patterns closer to rint.

From-SVN: r264578
---

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 75e2edb791c..fc5cfd0124d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -16125,6 +16125,38 @@
   DONE;
 })
 
+(define_expand "nearbyintxf2"
+  [(set (match_operand:XF 0 "register_operand")
+	(unspec:XF [(match_operand:XF 1 "register_operand")]
+		   UNSPEC_FRNDINT))]
+  "TARGET_USE_FANCY_MATH_387
+   && !flag_trapping_math")
+
+(define_expand "nearbyint<mode>2"
+  [(use (match_operand:MODEF 0 "register_operand"))
+   (use (match_operand:MODEF 1 "nonimmediate_operand"))]
+  "(TARGET_USE_FANCY_MATH_387
+    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+	  || TARGET_MIX_SSE_I387)
+    && !flag_trapping_math)
+   || (TARGET_SSE4_1 && TARGET_SSE_MATH)"
+{
+  if (TARGET_SSE4_1 && TARGET_SSE_MATH)
+    emit_insn (gen_sse4_1_round<mode>2
+	       (operands[0], operands[1], GEN_INT (ROUND_MXCSR
+						   | ROUND_NO_EXC)));
+  else
+    {
+      rtx op0 = gen_reg_rtx (XFmode);
+      rtx op1 = gen_reg_rtx (XFmode);
+
+      emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
+      emit_insn (gen_nearbyintxf2 (op0, op1));
+      emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0));
+    }
+  DONE;
+})
+
 (define_expand "round<mode>2"
   [(match_operand:X87MODEF 0 "register_operand")
    (match_operand:X87MODEF 1 "nonimmediate_operand")]
@@ -16340,38 +16372,6 @@
   DONE;
 })
 
-(define_expand "nearbyintxf2"
-  [(set (match_operand:XF 0 "register_operand")
-	(unspec:XF [(match_operand:XF 1 "register_operand")]
-		   UNSPEC_FRNDINT))]
-  "TARGET_USE_FANCY_MATH_387
-   && !flag_trapping_math")
-
-(define_expand "nearbyint<mode>2"
-  [(use (match_operand:MODEF 0 "register_operand"))
-   (use (match_operand:MODEF 1 "nonimmediate_operand"))]
-  "(TARGET_USE_FANCY_MATH_387
-    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
-	  || TARGET_MIX_SSE_I387)
-    && !flag_trapping_math)
-   || (TARGET_SSE4_1 && TARGET_SSE_MATH)"
-{
-  if (TARGET_SSE4_1 && TARGET_SSE_MATH)
-    emit_insn (gen_sse4_1_round<mode>2
-	       (operands[0], operands[1], GEN_INT (ROUND_MXCSR
-						   | ROUND_NO_EXC)));
-  else
-    {
-      rtx op0 = gen_reg_rtx (XFmode);
-      rtx op1 = gen_reg_rtx (XFmode);
-
-      emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
-      emit_insn (gen_nearbyintxf2 (op0, op1));
-      emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0));
-    }
-  DONE;
-})
-
 ;; Rounding mode control word calculation could clobber FLAGS_REG.
 (define_insn_and_split "*fist<mode>2_<rounding>_1"
   [(set (match_operand:SWI248x 0 "nonimmediate_operand")