From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 26 Mar 2020 16:54:54 +0000 (+0000)
Subject: brackets to be safe
X-Git-Tag: div_pipeline~1622
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=848da6409a7c48792d4f97e9b1b5eb9b78efeaf5;p=soc.git

brackets to be safe
---

diff --git a/src/soc/simulator/internalop_sim.py b/src/soc/simulator/internalop_sim.py
index b9724be9..c794e591 100644
--- a/src/soc/simulator/internalop_sim.py
+++ b/src/soc/simulator/internalop_sim.py
@@ -125,7 +125,7 @@ class InternalOpSimulator:
 
         inv_a = yield pdecode2.dec.op.inv_a
         if inv_a:
-            operand1 = ~operand1 & ((1<<64)-1)
+            operand1 = (~operand1) & ((1<<64)-1)
 
         cry_in = yield pdecode2.dec.op.cry_in
         if cry_in == CryIn.ONE.value: