From: Eric Botcazou <ebotcazou@adacore.com>
Date: Wed, 11 Jan 2017 11:27:43 +0000 (+0000)
Subject: re PR rtl-optimization/79032 (unaligned memory access generated with LRA and optimiza... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=849fccf8312f734dddf4e3ea84eeabd2e243a10d;p=gcc.git

re PR rtl-optimization/79032 (unaligned memory access generated with LRA and optimization)

	PR rtl-optimization/79032
	* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
	the alignment of the adjusted memory reference against that of MODE,
	instead of the alignment of the original memory reference.

From-SVN: r244311
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3c8f977e317..00eabd0c1cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2017-01-11  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR rtl-optimization/79032
+	* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
+	the alignment of the adjusted memory reference against that of MODE,
+	instead of the alignment of the original memory reference.
+
 2017-01-11  Martin Jambor  <mjambor@suse.cz>
 
 	* hsa.c (hsa_callable_function_p): Revert addition of DECL_ARTIFICIAL
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 5ada67a36ba..7b0d2f4b85f 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -1505,15 +1505,15 @@ simplify_operand_subreg (int nop, machine_mode reg_mode)
 				  MEM_ADDR_SPACE (subst))))
 	{
 	  /* If we change the address for a paradoxical subreg of memory, the
-	     address might violate the necessary alignment or the access might
-	     be slow.  So take this into consideration.  We need not worry
+	     new address might violate the necessary alignment or the access
+	     might be slow; take this into consideration.  We need not worry
 	     about accesses beyond allocated memory for paradoxical memory
 	     subregs as we don't substitute such equiv memory (see processing
 	     equivalences in function lra_constraints) and because for spilled
 	     pseudos we allocate stack memory enough for the biggest
 	     corresponding paradoxical subreg.  */
-	  if (!(MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (mode)
-		&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg)))
+	  if (!(MEM_ALIGN (subst) < GET_MODE_ALIGNMENT (mode)
+		&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (subst)))
 	      || (MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (innermode)
 		  && SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg))))
 	    return true;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f189a4484de..c892d161ea0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-01-11  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc.c-torture/execute/20170111-1.c: New test.
+
 2017-01-11  Richard Biener  <rguenther@suse.de>
 
 	* gcc.dg/tree-ssa/pr61743-1.c: Adjust.
diff --git a/gcc/testsuite/gcc.c-torture/execute/20170111-1.c b/gcc/testsuite/gcc.c-torture/execute/20170111-1.c
new file mode 100644
index 00000000000..0ff4bab23e6
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/20170111-1.c
@@ -0,0 +1,33 @@
+/* PR rtl-optimization/79032 */
+/* Reported by Daniel Cederman <cederman@gaisler.com> */
+
+extern void abort (void);
+
+struct S {
+  short a;
+  long long b;
+  short c;
+  char d;
+  unsigned short e;
+  long *f;
+};
+
+static long foo (struct S *s) __attribute__((noclone, noinline));
+
+static long foo (struct S *s)
+{
+  long a = 1;
+  a /= s->e;
+  s->f[a]--;
+  return a;
+}
+
+int main (void)
+{
+  long val = 1;
+  struct S s = { 0, 0, 0, 0, 2, &val };
+  val = foo (&s);
+  if (val != 0)
+    abort ();
+  return 0;
+}