From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 28 Jul 2014 09:54:50 +0000 (+0200)
Subject: kc705: add ddram pins
X-Git-Tag: 24jan2021_ls180~2099^2~339
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84eb146e0a6bf642f1358ca5f588754999d9f14b;p=litex.git

kc705: add ddram pins
---

diff --git a/mibuild/platforms/kc705.py b/mibuild/platforms/kc705.py
index fe6f91f1..4022b85e 100644
--- a/mibuild/platforms/kc705.py
+++ b/mibuild/platforms/kc705.py
@@ -80,6 +80,48 @@ _io = [
 		Subsignal("spdif", Pins("J17")),
 		Subsignal("spdif_out", Pins("G20")),
 		IOStandard("LVCMOS25")),
+
+	("ddram", 0,
+		Subsignal("a", Pins("\
+			AH12 AG13 AG12 AF12 AJ12 AJ13 AJ14 AH14 \
+		 	AK13 AK14 AF13 AE13 AJ11 AH11 AK10 AK11"),
+			IOStandard("SSTL15")),
+		Subsignal("ba", Pins("AH9 AG9 AK9"),
+			IOStandard("SSTL15")),
+		Subsignal("cke", Pins("AF10 AE10"),
+			IOStandard("SSTL15")),
+		Subsignal("ras_n", Pins("AD9"),
+			IOStandard("SSTL15")),
+		Subsignal("cas_n", Pins("AC11"),
+			IOStandard("SSTL15")),
+		Subsignal("we_n", Pins("AE9"),
+			IOStandard("SSTL15")),
+		Subsignal("cs_n", Pins("AC12 AE8"),
+			IOStandard("SSTL15")),
+		Subsignal("odt", Pins("AD8 AC10"),
+			IOStandard("SSTL15")),
+		Subsignal("dm", Pins("Y16 AB17 AF17 AE16 AK5 AJ3 AF6 AC7"),
+			IOStandard("SSTL15")),
+		Subsignal("dq", Pins("\
+			AA15 AA16 AC14 AD14 AA17 AB15 AE15 Y15 \
+			AB19 AD16 AC19 AD17 AA18 AB18 AE18 AD18 \
+			AG19 AK19 AG18 AF18 AH19 AJ19 AE19 AD19 \
+			AK16 AJ17 AG15 AF15 AH17 AG14 AH15 AK15 \
+			AK8 AK6 AG7 AF7 AF8 AK4 AJ8 AJ6 \
+			AH5 AH6 AJ2 AH2 AH4 AJ4 AK1 AJ1 \
+			AF1 AF2 AE4 AE3 AF3 AF5 AE1 AE5 \
+			AC1 AD3 AC4 AC5 AE6 AD6 AC2 AD4"),
+			IOStandard("SSTL15")),
+		Subsignal("dqs_p", Pins("AC16 Y19 AJ18 AH16 AH7 AG2 AG4 AD2"),
+			IOStandard("DIFF_SSTL15")),
+		Subsignal("dqs_n", Pins("AC15 Y18 AK18 AJ16 AJ7 AH1 AG3 AD1"),
+			IOStandard("DIFF_SSTL15")),
+		Subsignal("clk_p", Pins("AG10"), IOStandard("DIFF_SSTL15")),
+		Subsignal("clk_n", Pins("AH10"), IOStandard("DIFF_SSTL15")),
+		Subsignal("rst_n", Pins("AK3"), IOStandard("LVCMOS15")),
+		Misc("SLEW=FAST"),
+		Misc("VCCAUX_IO=HIGH")
+	),
 ]
 
 def Platform(*args, toolchain="ise", **kwargs):