From: dalance <dalance@gmail.com>
Date: Wed, 11 Nov 2020 03:03:37 +0000 (+0900)
Subject: Fix begin/end in generate
X-Git-Tag: working-ls180~96^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84ecb321b4f9f9e6284e4c26eee81759b93f266c;p=yosys.git

Fix begin/end in generate
---

diff --git a/tests/simple/const_branch_finish.v b/tests/simple/const_branch_finish.v
index 8166688e6..f585be87a 100644
--- a/tests/simple/const_branch_finish.v
+++ b/tests/simple/const_branch_finish.v
@@ -21,9 +21,6 @@ module top;
 		end
 	end
 	generate
-		begin : unconditional_block
-			initial `CONSTANT_CHECK
-		end
 		if (WIDTH == 32) begin : conditional_block
 			initial `CONSTANT_CHECK
 		end
diff --git a/tests/simple/generate.v b/tests/simple/generate.v
index 12327b36e..667f40096 100644
--- a/tests/simple/generate.v
+++ b/tests/simple/generate.v
@@ -167,7 +167,7 @@ module gen_test7;
 	reg [2:0] out2;
 	wire [2:0] out3;
 	generate
-		begin : cond
+		if (1) begin : cond
 			reg [2:0] sub_out1;
 			reg [2:0] sub_out2;
 			wire [2:0] sub_out3;
@@ -215,9 +215,9 @@ module gen_test8;
 
 	wire [1:0] x = 2'b11;
 	generate
-		begin : A
+		if (1) begin : A
 			wire [1:0] x;
-			begin : B
+			if (1) begin : B
 				wire [1:0] x = 2'b00;
 				`ASSERT(x == 0)
 				`ASSERT(A.x == 2)
@@ -228,7 +228,7 @@ module gen_test8;
 				`ASSERT(gen_test8.A.C.x == 1)
 				`ASSERT(gen_test8.A.B.x == 0)
 			end
-			begin : C
+			if (1) begin : C
 				wire [1:0] x = 2'b01;
 				`ASSERT(x == 1)
 				`ASSERT(A.x == 2)