From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 30 Apr 2019 13:35:36 +0000 (+0200)
Subject: Include filename in "Executing Verilog-2005 frontend" message, fixes #959
X-Git-Tag: yosys-0.9~142^2~12
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=84f3a796e1232b19674a412b5d011d208d923f5c;p=yosys.git

Include filename in "Executing Verilog-2005 frontend" message, fixes #959

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc
index ed6ce2ecb..9e624d355 100644
--- a/frontends/verilog/verilog_frontend.cc
+++ b/frontends/verilog/verilog_frontend.cc
@@ -242,8 +242,6 @@ struct VerilogFrontend : public Frontend {
 		nowb_mode = false;
 		default_nettype_wire = true;
 
-		log_header(design, "Executing Verilog-2005 frontend.\n");
-
 		args.insert(args.begin()+1, verilog_defaults.begin(), verilog_defaults.end());
 
 		size_t argidx;
@@ -415,6 +413,8 @@ struct VerilogFrontend : public Frontend {
 		}
 		extra_args(f, filename, args, argidx);
 
+		log_header(design, "Executing Verilog-2005 frontend: %s\n", filename.c_str());
+
 		log("Parsing %s%s input from `%s' to AST representation.\n",
 				formal_mode ? "formal " : "", sv_mode ? "SystemVerilog" : "Verilog", filename.c_str());